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Thu, 18 Jan 2024 13:08:30 -0600 From: Radhey Shyam Pandey To: , , , , , CC: , , , Piyush Mehta , Radhey Shyam Pandey Subject: [PATCH 1/2] ata: ahci_ceva: fix error handling for Xilinx GT PHY support Date: Fri, 19 Jan 2024 00:38:23 +0530 Message-ID: <1705604904-471889-2-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1705604904-471889-1-git-send-email-radhey.shyam.pandey@amd.com> References: <1705604904-471889-1-git-send-email-radhey.shyam.pandey@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099E1:EE_|BY5PR12MB4903:EE_ X-MS-Office365-Filtering-Correlation-Id: f6a3aba8-e0a5-4469-4a1c-08dc1858dddd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OPlQ4VSrw8EoZX/yYF7iux5Ckx+w+wM7ZN3RnYZxaNmmX9A9qokEOFEjyQBOkfUcf/i5JTBwOnpRGehd4hQAf7ZLAzsHQ9oeLaWxJ3lTw7Cwsn9WgLHraznX4JFPidOI71NmVjTsj2awb7WfMOSOHVl3hB0svMAwlglBbcgFIBkWO7InVEb8YRQkP4VoCdWqvZg6TwU4rJqNldOPLbcENPhz0sH77344Okvwgwg3OIksUp2jflfjLjSLX/C4Z4dQox4wSHAaqpe+F9wb6XnHVyIq1xvvjrzMg+GntMMBWenbzghzvWvRI7qa6iCv2/5xKgoUq8tKKR5TEM9Jzb9lDbga/uKqzlk1KqU0M96gqb4lbOJpZQ+RyzgwPQcJ5onD8wHnpBgiiKY4VoOlQh21C7ympjsmDnyCj1UhvzoSRwmOPE2XxBMoJgRXVOey2qDcM2qxjft2ipSbciGNYMx0NHTOlCENjo4v+rlf16yHcLzu1M9ddrtKe8x+P5dPIO3FDWAzElOwE1UYV37gkwCI5klaJOwa+XTXC3tZd2y6bm54TcT7Xg/OtA7K3Q8UdxgAK1on/7nQ2SA2q7Q19e34QBiB5stjAo8OIyIlTg4QqPFNewoeaJ5bv3uF3tX7YetzGZDMXGXREoNbrp1VPh7rzo0qaFhwlMWlh+loT2myZXWCVCQ3I+a5A7Ugtxz4CdfOyiDLDdgVfF3uIThzZNX+KQWV8si2TS6Xn6HrvjxU4v+RAX6Rb8e/HyuppcG/vMDLmu9eYSNCuBDKCHvulBjUNg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(346002)(39860400002)(396003)(136003)(230922051799003)(64100799003)(82310400011)(1800799012)(186009)(451199024)(46966006)(36840700001)(40470700004)(36860700001)(47076005)(8936002)(8676002)(4326008)(81166007)(36756003)(356005)(2906002)(86362001)(82740400003)(41300700001)(5660300002)(26005)(40460700003)(40480700001)(426003)(336012)(478600001)(6666004)(83380400001)(2616005)(54906003)(316002)(6636002)(70206006)(110136005)(70586007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2024 19:08:33.7442 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f6a3aba8-e0a5-4469-4a1c-08dc1858dddd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099E1.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4903 From: Piyush Mehta Platform clock and phy error resources are not cleaned up in Xilinx GT PHY error path. To fix introduce error label for ahci_platform_disable_clks and phy_power_off/exit and call them in error path. No functional change. Fixes: 9a9d3abe24bb ("ata: ahci: ceva: Update the driver to support xilinx GT phy") Signed-off-by: Piyush Mehta Signed-off-by: Radhey Shyam Pandey --- --- drivers/ata/ahci_ceva.c | 47 +++++++++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 14 deletions(-) diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index 64f7f7d6ba84..bfc513f1d0b3 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -196,7 +196,7 @@ static int ceva_ahci_probe(struct platform_device *pdev) struct ahci_host_priv *hpriv; struct ceva_ahci_priv *cevapriv; enum dev_dma_attr attr; - int rc; + int rc, i; cevapriv = devm_kzalloc(dev, sizeof(*cevapriv), GFP_KERNEL); if (!cevapriv) @@ -219,8 +219,6 @@ static int ceva_ahci_probe(struct platform_device *pdev) if (rc) return rc; } else { - int i; - rc = ahci_platform_enable_clks(hpriv); if (rc) return rc; @@ -229,8 +227,11 @@ static int ceva_ahci_probe(struct platform_device *pdev) for (i = 0; i < hpriv->nports; i++) { rc = phy_init(hpriv->phys[i]); - if (rc) - return rc; + if (rc) { + while (--i >= 0) + phy_exit(hpriv->phys[i]); + goto disable_clks; + } } /* De-assert the controller reset */ @@ -240,7 +241,7 @@ static int ceva_ahci_probe(struct platform_device *pdev) rc = phy_power_on(hpriv->phys[i]); if (rc) { phy_exit(hpriv->phys[i]); - return rc; + goto disable_phys; } } } @@ -252,52 +253,60 @@ static int ceva_ahci_probe(struct platform_device *pdev) if (of_property_read_u8_array(np, "ceva,p0-cominit-params", (u8 *)&cevapriv->pp2c[0], 4) < 0) { dev_warn(dev, "ceva,p0-cominit-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } if (of_property_read_u8_array(np, "ceva,p1-cominit-params", (u8 *)&cevapriv->pp2c[1], 4) < 0) { dev_warn(dev, "ceva,p1-cominit-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } /* Read OOB timing value for COMWAKE from device-tree*/ if (of_property_read_u8_array(np, "ceva,p0-comwake-params", (u8 *)&cevapriv->pp3c[0], 4) < 0) { dev_warn(dev, "ceva,p0-comwake-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } if (of_property_read_u8_array(np, "ceva,p1-comwake-params", (u8 *)&cevapriv->pp3c[1], 4) < 0) { dev_warn(dev, "ceva,p1-comwake-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } /* Read phy BURST timing value from device-tree */ if (of_property_read_u8_array(np, "ceva,p0-burst-params", (u8 *)&cevapriv->pp4c[0], 4) < 0) { dev_warn(dev, "ceva,p0-burst-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } if (of_property_read_u8_array(np, "ceva,p1-burst-params", (u8 *)&cevapriv->pp4c[1], 4) < 0) { dev_warn(dev, "ceva,p1-burst-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } /* Read phy RETRY interval timing value from device-tree */ if (of_property_read_u16_array(np, "ceva,p0-retry-params", (u16 *)&cevapriv->pp5c[0], 2) < 0) { dev_warn(dev, "ceva,p0-retry-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } if (of_property_read_u16_array(np, "ceva,p1-retry-params", (u16 *)&cevapriv->pp5c[1], 2) < 0) { dev_warn(dev, "ceva,p1-retry-params property not defined\n"); - return -EINVAL; + rc = -EINVAL; + goto disable_phys; } /* @@ -321,6 +330,16 @@ static int ceva_ahci_probe(struct platform_device *pdev) disable_resources: ahci_platform_disable_resources(hpriv); + +disable_phys: + while (--i >= 0) { + phy_power_off(hpriv->phys[i]); + phy_exit(hpriv->phys[i]); + } + +disable_clks: + ahci_platform_disable_clks(hpriv); + return rc; } -- 2.34.1