Received-SPF: pass (google.com: domain of linux-kernel+bounces-31348-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249;
Date: Fri, 19 Jan 2024 16:11:37 +0000
From: Conor Dooley <conor@kernel.org>
To: "Ghennadi Procopciuc (OSS)" <ghennadi.procopciuc@oss.nxp.com>
Cc: Chester Lin <chester62515@gmail.com>, Andreas Farber <afaerber@suse.de>,
	Matthias Brugger <mbrugger@suse.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, NXP S32 Linux Team <s32@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
	Ciprian Costea <ciprianmarian.costea@nxp.com>
Subject: Re: [PATCH 1/3] dt-bindings: clock: s32g: add uSDHC clock IDs
Message-ID: <20240119-magnetic-racing-0adf8e5fbd4a@spud>
References: <20240119130231.2854146-1-ghennadi.procopciuc@oss.nxp.com>
 <20240119130231.2854146-2-ghennadi.procopciuc@oss.nxp.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
	protocol="application/pgp-signature"; boundary="IwcdJ08lEQ0ScTZl"
Content-Disposition: inline
In-Reply-To: <20240119130231.2854146-2-ghennadi.procopciuc@oss.nxp.com>


--IwcdJ08lEQ0ScTZl
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
> From: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
>=20
> Add the SCMI clock IDs for the uSDHC controller present on
> S32G SoCs.
>=20
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
> ---
>  include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>  create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
>=20
> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bin=
dings/clock/s32g-scmi-clock.h
> new file mode 100644
> index 000000000000..739f98a924c3
> --- /dev/null
> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +/*
> + * Copyright 2020-2024 NXP
> + */
> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
> +
> +/* uSDHC */
> +#define S32G_SCMI_CLK_USDHC_AHB		31
> +#define S32G_SCMI_CLK_USDHC_MODULE	32
> +#define S32G_SCMI_CLK_USDHC_CORE	33
> +#define S32G_SCMI_CLK_USDHC_MOD32K	34

Why do these numbers not start at 0?

--IwcdJ08lEQ0ScTZl
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZaqfOQAKCRB4tDGHoIJi
0m6QAQDkyHsKFGP8Nx5njMmo5n45oTbiIFTNGOPzdthdFHkyAgEA7YBexbTeR4Lj
zdvAD8t9m+g3o/zvlGrCYsXaDDCNkAc=
=2Ek4
-----END PGP SIGNATURE-----

--IwcdJ08lEQ0ScTZl--