Received-SPF: pass (google.com: domain of linux-kernel+bounces-31386-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3;
Precedence: bulk
MIME-Version: 1.0
References: <20240119160528.GA5336@willie-the-truck> <20240119163408.GA468084-robh@kernel.org>
In-Reply-To: <20240119163408.GA468084-robh@kernel.org>
From: Rob Herring <robh@kernel.org>
Date: Fri, 19 Jan 2024 10:58:45 -0600
Message-ID: <CAL_JsqLu8A22OidU-n=nbpyoEZcB+nsc=5ZiXmT2A+s4VdrLkw@mail.gmail.com>
Subject: Re: [GIT PULL] arm64 fixes for -rc1
To: Will Deacon <will@kernel.org>
Cc: torvalds@linux-foundation.org, catalin.marinas@arm.com, 
	linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, 
	kernel-team@android.com
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

On Fri, Jan 19, 2024 at 10:34=E2=80=AFAM Rob Herring <robh@kernel.org> wrot=
e:
>
> On Fri, Jan 19, 2024 at 04:05:28PM +0000, Will Deacon wrote:
> > Hi Linus,
> >
> > Please pull these arm64 fixes for -rc1. I think the main one is fixing
> > the dynamic SCS patching when full LTO is enabled (clang was silently
> > getting this horribly wrong), but it's all good stuff. Rob just pointed
> > out that the fix to the workaround for erratum #2966298 might not be
> > necessary, but in the worst case it's harmless and since the official
> > description leaves a little to be desired here, I've left it in.
> >
> > Cheers,
> >
> > Will
> >
> > --->8
> >
> > The following changes since commit db32cf8e280b46726065c518e90761bb0229=
bacf:
> >
> >   Merge branch 'for-next/fixes' into for-next/core (2024-01-04 12:32:33=
 +0000)
> >
> > are available in the Git repository at:
> >
> >   git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/ar=
m64-fixes
> >
> > for you to fetch changes up to 1b20d0486a602417defb5bf33320d31b2a7a47f8=
:
> >
> >   arm64: Fix silcon-errata.rst formatting (2024-01-18 11:15:43 +0000)
> >
> > ----------------------------------------------------------------
> > arm64 fixes for -rc1
> >
> > - Fix shadow call stack patching with LTO=3Dfull
> >
> > - Fix voluntary preemption of the FPSIMD registers from assembly code
> >
> > - Fix workaround for A520 CPU erratum #2966298 and extend to A510
> >
> > - Fix SME issues that resulted in corruption of the register state
> >
> > - Minor fixes (missing includes, formatting)
> >
> > ----------------------------------------------------------------
> > Ard Biesheuvel (2):
> >       arm64: scs: Work around full LTO issue with dynamic SCS
> >       arm64: fpsimd: Bring cond_yield asm macro in line with new rules
> >
> > Mark Brown (3):
> >       arm64/ptrace: Don't flush ZA/ZT storage when writing ZA via ptrac=
e
> >       arm64/fpsimd: Remove spurious check for SVE support
> >       arm64/sme: Always exit sme_alloc() early with existing storage
> >
> > Mark Rutland (2):
> >       arm64: entry: fix ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
>
> I've commented on the patch, but this doesn't fix anything. The original
> work-around was fine.

Sorry, failed to read your commentary at the top. I suppose all this
is fine. It would be nice to have a chance to see all this before it
gets sent upstream.

Rob