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Fri, 19 Jan 2024 13:59:30 -0800 (PST) Received: from localhost ([192.184.165.199]) by smtp.gmail.com with ESMTPSA id 37-20020a630a25000000b005ceb4a6d72bsm3824521pgk.65.2024.01.19.13.59.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 13:59:30 -0800 (PST) Date: Fri, 19 Jan 2024 13:59:30 -0800 (PST) X-Google-Original-Date: Fri, 19 Jan 2024 13:58:56 PST (-0800) Subject: Re: [PATCH v5 0/5] RISC-V SBI debug console extension support In-Reply-To: CC: Greg KH , nathan@kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , jirislaby@kernel.org, Conor Dooley , ajones@ventanamicro.com, linux-serial@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org From: Palmer Dabbelt To: apatel@ventanamicro.com Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit On Fri, 19 Jan 2024 02:09:18 PST (-0800), apatel@ventanamicro.com wrote: > On Sat, Jan 13, 2024 at 12:00 AM Palmer Dabbelt wrote: >> >> On Thu, 11 Jan 2024 06:50:37 PST (-0800), patchwork-bot+linux-riscv@kernel.org wrote: >> > Hello: >> > >> > This series was applied to riscv/linux.git (for-next) >> > by Palmer Dabbelt : >> > >> > On Fri, 24 Nov 2023 12:39:00 +0530 you wrote: >> >> The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines >> >> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 >> >> functions sbi_console_putchar() and sbi_console_getchar(). >> >> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) >> >> >> >> This series adds support for SBI debug console (DBCN) extension in >> >> Linux RISC-V. >> >> >> >> [...] >> > >> > Here is the summary with links: >> > - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar() >> > https://git.kernel.org/riscv/c/f503b167b660 >> > - [v5,2/5] RISC-V: Add SBI debug console helper routines >> > https://git.kernel.org/riscv/c/f43fabf444ca >> > - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon >> > https://git.kernel.org/riscv/c/c77bf3607a0f >> > - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver >> > https://git.kernel.org/riscv/c/88ead68e764c >> > - [v5,5/5] RISC-V: Enable SBI based earlycon support >> > https://git.kernel.org/riscv/c/50942ad6ddb5 >> > >> > You are awesome, thank you! >> >> Nathan points out that this has some semantic conflicts with a patch in >> Greg's TTY tree: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787 >> >> So I think the best bet is to wait on Greg's patch to land in Linus' >> tree, and then base a v6 of this patch set on that merged patch. I'm >> going to drop this one from for-next. > > Greg's patch is now available in upstream Linux so I will rebase and > send out v6. Sorry, I forgot about this one and merged it. I just sent up a fixup: https://lore.kernel.org/all/20240119215612.20529-2-palmer@rivosinc.com/ . > > Thanks, > Anup