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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?gs+xaXSChVHHqWkjr7/THz25znQxgkYiMc9itTtLDWtCQrOm5lU6IHE/YxOm?= =?us-ascii?Q?zQC8s57QL/vR9CHareCPE57ZNIvBudJTTiN2T37QSmwcDWM968lmVlTZnPyv?= =?us-ascii?Q?GYGdg87bVXbrpI1eNSxnt+y8cQ8NKJwBe8FEHxsxh1n2GzVGTYTv69F8fTxW?= =?us-ascii?Q?hHVO2sXG5mqJEW6MqMN4bTcNm/keB/VAebyTgIAX+UilT96I4qdivgJU76pz?= =?us-ascii?Q?AhSh5ZwMnwpz0fFXR4Kb4lNr3bx9i3RDxcNFsh8p7Smp+AnExwaQ8ICd8GLj?= =?us-ascii?Q?+X9UO9eYzXCXvBWdhAY2zS8qEWKFpjHV5Rpn/Bc1CyEs2t7LelQm2D5Tlz7+?= =?us-ascii?Q?84l1d21sTK0kxru3rf0FH92gdv1BfsUUF7jn0Q3lf+e6ICBrBUkVYhC94LIN?= =?us-ascii?Q?ggRJeATa970WamgWE2H1+0y8arjBEhIPI9mN5sskC3t58r9uhaUuC8DEf9ub?= =?us-ascii?Q?qkF15pUgk0uQx1YGveCzRbpK0du9IPfucHpf8v+KmMfYbsaNK01njnWVaTM7?= =?us-ascii?Q?OxERmuEWaYpaHhm4oEXgUgP9sHjljBHhmG4RYbWm44SfDlMB6HeLi/h8W6kB?= =?us-ascii?Q?97CRPS0XpHT0j7iyTYy6hoWybKCknCVMTy0KKxR9vzbBRzyjcugOojJs3CHP?= =?us-ascii?Q?3Gd6uVAH3FsE07eT9LV9kloa4G46oTuoM1ivqPL4T4r44eoLK51zRvquKVBo?= =?us-ascii?Q?dkphifHvsJrpTd3FExt+fo58Tgmxo6WZvPoNGZELinsnQIQF0EM4ps8QPf+u?= =?us-ascii?Q?9dXtWQVdFIXecL+kVzAuyJDcfAIlDg1pawvCPD8kC208c8vDoBIADHgAMDPb?= =?us-ascii?Q?BOTT+e184YwR6PyeiR3gDagqBXjYwrVmECrsJl4BImrX9AxXj+5y2J2Q4FBH?= =?us-ascii?Q?0qapHoqDcPwbZgegmUs/Tm/jSxgTARzglWiNojj2/hSABn0Mt+D+rmBFPOxB?= =?us-ascii?Q?9oyUHUi4YJ1Cm3HF9YBH8rAPrRwHTTTurb5viZbGZvTnC2/WOHF9IFSGAe7Q?= =?us-ascii?Q?M8sEqEZPY7UAhgf8oiYI9ttwPvozl5q5eyH33mUcMYJ5Wgd/e7FEScjOVj0W?= =?us-ascii?Q?nFyZv5EUFr6F2LFia1QnavaDCoPN8kdoHk0I09fiLpP8OaBIBWiGIpbx1Xwf?= =?us-ascii?Q?HqD+kKJoZ6D4aleuY/i8TFMhBj5AEgpD41sqPubHih7RYc9/ZE5cmgeoAHnk?= =?us-ascii?Q?ZpmLGnfstyppalCrwMmYm71AAY6PAIF9zS2z6Z6zoKDfw3/wkQlHd6O18Sd7?= =?us-ascii?Q?R9V/s2WH0kYgUgh6pyKueX9S8stGpNqzexIkSgvr3/ypXsJ0aH8ycobDcM3y?= =?us-ascii?Q?4ZR300xM3Acyto3Ye5o1XFUg0zdFLE/13ZvsLSybrBDTEkEkPPv45Dpa/n3a?= =?us-ascii?Q?tCYnMWmP98ZrmWObZXHNt1NfD+I0exVb4vUZm6JNWtJQMMEO6kRmeW7IyZ7X?= =?us-ascii?Q?3M2ZzKvgfMeWdZssQ5/tu/5z5HtF4CR06r37GAjAhhiqIsJwwrhn9VWuw3P5?= =?us-ascii?Q?vEwPBpSHdinGdrvV3lgsDqA3G9gEGdhUR7qpRbqYm4yvgQkHgOD4YvDj6xxP?= =?us-ascii?Q?5Us4XRSv2xaTRXyRfClhfz1eHxGTPDIAjIEcDKwn?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 19b8f975-bf79-44b3-4c68-08dc1a70c8fb X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9417.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2024 11:04:49.3122 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AFeymK1LOabSkZWGs5gch9gYpN7n8d4l0P83BSDa0mOzdnggH/Ixd48HSbMhuO+Lf1aHPI87YjjcGta4mYLZ5g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR04MB9911 From: Peng Fan Some clocks may exported to linux, while those clocks are not allowed to configure by Linux. For example: SYS_CLK1----- \ --MUX--->MMC1_CLK / SYS_CLK2----- MMC1 needs set parent, so SYS_CLK1 and SYS_CLK2 are exported to Linux, then the clk propagation will touch SYS_CLK1 or SYS_CLK2. So we need bypass the failure for SYS_CLK1 or SYS_CLK2 when enable the clock of MMC1, adding scmi_no_state_ctrl_clk_ops to use software enable counter, while not calling scmi api. Co-developed-by: Cristian Marussi Signed-off-by: Cristian Marussi Signed-off-by: Peng Fan --- V4: Add scmi_no_state_ctrl_clk_ops per Cristian Add Cristian's tag V3: Add check in atomic enable V2: New. Take Cristian's suggestion drivers/clk/clk-scmi.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index 8cbe24789c24..5747b6d651f0 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -194,6 +194,15 @@ static const struct clk_ops scmi_atomic_clk_ops = { .determine_rate = scmi_clk_determine_rate, }; +static const struct clk_ops scmi_no_state_ctrl_clk_ops = { + .recalc_rate = scmi_clk_recalc_rate, + .round_rate = scmi_clk_round_rate, + .set_rate = scmi_clk_set_rate, + .set_parent = scmi_clk_set_parent, + .get_parent = scmi_clk_get_parent, + .determine_rate = scmi_clk_determine_rate, +}; + static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, const struct clk_ops *scmi_ops) { @@ -290,8 +299,10 @@ static int scmi_clocks_probe(struct scmi_device *sdev) * specify (or support) an enable_latency associated with a * clock, we default to use atomic operations mode. */ - if (is_atomic && - sclk->info->enable_latency <= atomic_threshold) + if (sclk->info->state_ctrl_forbidden) + scmi_ops = &scmi_no_state_ctrl_clk_ops; + else if (is_atomic && + sclk->info->enable_latency <= atomic_threshold) scmi_ops = &scmi_atomic_clk_ops; else scmi_ops = &scmi_clk_ops; -- 2.37.1