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Sun, 21 Jan 2024 17:35:53 -0800 (PST) Received: from L6YN4KR4K9.bytedance.net ([139.177.225.253]) by smtp.gmail.com with ESMTPSA id m7-20020a62f207000000b006dbbc6ab938sm4750692pfh.199.2024.01.21.17.35.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 21 Jan 2024 17:35:53 -0800 (PST) From: Yunhui Cui To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, cuiyunhui@bytedance.com, conor.dooley@microchip.com, robh@kernel.org, sudeep.holla@arm.com, pierre.gondois@arm.com, suagrfillet@gmail.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] RISC-V: cacheinfo: add init_cache_level() Date: Mon, 22 Jan 2024 09:35:10 +0800 Message-Id: <20240122013510.55788-1-cuiyunhui@bytedance.com> X-Mailer: git-send-email 2.39.2 (Apple Git-143) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit When cacheinfo_sysfs_init() is executed, the general weak function init_cache_level() returns -ENOENT, causing failure to add the "cache" node to /sys/devices/system/cpu/cpux/. Implement the init_cache_level() function on RISC-V to fix it. Signed-off-by: Yunhui Cui --- arch/riscv/kernel/cacheinfo.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c index 09e9b88110d1..be9169a38bac 100644 --- a/arch/riscv/kernel/cacheinfo.c +++ b/arch/riscv/kernel/cacheinfo.c @@ -71,6 +71,12 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, this_leaf->type = type; } +int init_cache_level(unsigned int cpu) +{ + /* The topology has been parsed by acpi or dt, return true. */ + return 0; +} + int populate_cache_leaves(unsigned int cpu) { struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); -- 2.20.1