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From: "Tian, Kevin" <kevin.tian@intel.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>, "joro@8bytes.org"
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CC: "Liu, Yi L" <yi.l.liu@intel.com>, "nicolinc@nvidia.com"
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Subject: RE: [RFCv2 PATCH 5/7] iommufd: Introduce data struct for AMD nested
 domain allocation
Thread-Topic: [RFCv2 PATCH 5/7] iommufd: Introduce data struct for AMD nested
 domain allocation
Thread-Index: AQHaROtZDmd79pU1RUa4//VsDeeCg7Dlk3kg
Date: Mon, 22 Jan 2024 08:46:14 +0000
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References: <20240112000646.98001-1-suravee.suthikulpanit@amd.com>
 <20240112000646.98001-6-suravee.suthikulpanit@amd.com>
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> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Sent: Friday, January 12, 2024 8:07 AM
>=20
> +/**
> + * struct iommu_hwpt_amd_v2 - AMD IOMMU specific user-managed
> + *                            v2 I/O page table data
> + * @gcr3: GCR3 guest physical ddress
> + * @flags.glx: GCR3 table levels
> + * @flags.giov: GIOV mode
> + * @flags.guest_paging_mode: Guest v2 page table paging mode
> + * @flags.reserved : Must be 0
> + * @gdom_id: Guest domain ID
> + * @__reserved: Must be 0
> + */
> +struct iommu_hwpt_amd_v2 {
> +	__aligned_u64 gcr3;
> +	struct {
> +		__aligned_u64 glx  : 1,
> +			      giov : 1,

My impression was that giov allows non-PASID requests to be treated
as if tagged with pasid#0. kind of a prerequisite for enabling nested
translation? how does it work if guest disables it?

> +			      guest_paging_mode : 2,
> +			      reserved : 60;
> +	} flags;
> +	__u32 gdom_id;

this is not used in this series.