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Message-ID: <74c3f9b7-1215-4216-bf56-c20e40acdeb8@kernel.org>
Date: Mon, 22 Jan 2024 19:29:48 +0900
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Subject: Re: [PATCH 2/2] ata: ahci_ceva: add missing enable regulator API for
 Xilinx GT PHY support
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To: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>, cassel@kernel.org,
 richardcochran@gmail.com, piyush.mehta@xilinx.com, axboe@kernel.dk,
 michal.simek@amd.com
Cc: linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, git@amd.com,
 Piyush Mehta <piyush.mehta@amd.com>
References: <1705604904-471889-1-git-send-email-radhey.shyam.pandey@amd.com>
 <1705604904-471889-3-git-send-email-radhey.shyam.pandey@amd.com>
From: Damien Le Moal <dlemoal@kernel.org>
Organization: Western Digital Research
In-Reply-To: <1705604904-471889-3-git-send-email-radhey.shyam.pandey@amd.com>
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On 1/19/24 04:08, Radhey Shyam Pandey wrote:
> From: Piyush Mehta <piyush.mehta@amd.com>
> 
> The regulators API are disabled and enabled, during suspend and resume,
> respectively. The following warning notice shows up on the initial suspend
> because the enable regulators API is unaddressed in the probe:
> 
> regulator-dummy: Underflow of regulator enable count
> 
> Added the ahci_platform_enable_regulators API in probe to maintain the
> regulator enabled and disabled ref count.
> 
> Fixes: 9a9d3abe24bb ("ata: ahci: ceva: Update the driver to support xilinx GT phy")
> Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>

Looks OK to me.

Reviewed-by: Damien Le Moal <dlemoal@kernel.org>

-- 
Damien Le Moal
Western Digital Research