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Mon, 22 Jan 2024 12:58:40 GMT Received: from [10.253.14.163] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 22 Jan 2024 04:58:36 -0800 Message-ID: <17117e8a-e808-4908-985f-932232b1e6ea@quicinc.com> Date: Mon, 22 Jan 2024 20:58:33 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] arm64: dts: qcom: ipq9574: Add PPE device tree node Content-Language: en-US To: Krzysztof Kozlowski , Dmitry Baryshkov CC: , , , , , , , , , , , , , , , References: <20240110112059.2498-1-quic_luoj@quicinc.com> <20240110112059.2498-2-quic_luoj@quicinc.com> <6fc9e65a-709a-4923-b0b3-7c460199417a@quicinc.com> <84366aa2-e51e-4bce-a9d5-2420f1d9db0c@linaro.org> From: Jie Luo In-Reply-To: <84366aa2-e51e-4bce-a9d5-2420f1d9db0c@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Y5YKXXsMobSKxNPKclEV3TvBAd4GDU69 X-Proofpoint-ORIG-GUID: Y5YKXXsMobSKxNPKclEV3TvBAd4GDU69 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-22_02,2024-01-22_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 mlxscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 suspectscore=0 bulkscore=0 mlxlogscore=914 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401220091 On 1/12/2024 10:51 PM, Krzysztof Kozlowski wrote: > On 12/01/2024 15:40, Jie Luo wrote: >>> >>> From the first glance, the bindings do not follow upstream principles. >>> You have all the settings (tdm, port config, etc) in the DT, while >>> they should instead go to the driver. Well, unless you expect that the >>> board might need to override them. >>> >> Hi Dmitry, >> The TDM configuration varies per SoC type, since the ethernet port >> capabilities of the SoCs vary. So we will have two different TDM >> configurations for IPQ5332 and IPQ9574 SoC. The driver also will >> need to support future SoC, so we choose to configure this from the >> DTSI. The same reason applies to the port scheduler config as well. > > Your statements here confirm Dmitry suggestion, so these are not board > specific and should go to the driver. Please read again Dmitry's sentences. > > Best regards, > Krzysztof > Sure, we will update the driver to configure the TDM depending on the SoC need.