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Mon, 22 Jan 2024 09:26:23 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240108135421.684263-1-tmaimon77@gmail.com> <20240108135421.684263-7-tmaimon77@gmail.com> <171300da-3d49-4e1f-8969-9a454ecdd698@linaro.org> <018fc173-edf3-4490-8f29-4059bd17268e@linaro.org> In-Reply-To: <018fc173-edf3-4490-8f29-4059bd17268e@linaro.org> From: Tomer Maimon Date: Mon, 22 Jan 2024 19:26:12 +0200 Message-ID: Subject: Re: [PATCH v22 6/8] dt-bindings: clock: npcm845: replace reg with syscon property To: Krzysztof Kozlowski Cc: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com, benjaminfair@google.com, openbmc@lists.ozlabs.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Hi Krzysztof, Thanks for your comments. On Tue, 16 Jan 2024 at 22:40, Krzysztof Kozlowski wrote: > > On 16/01/2024 20:37, Tomer Maimon wrote: > > Hi Krzysztof, > > > > As explained in my [PATCH v22 4/8] dt-bindings: soc: nuvoton: add > > binding for clock and reset registers mail. > > > > In the NPCM8XX SoC, the reset and the clock register modules are > > scrambled in the same memory register region. > > The NPCM8XX Clock driver is still in the upstream process (for a long > > time) but the NPCM8XX reset driver is already upstreamed. > > First of all, the drivers itself don't matter here, we talk about > bindings. I assume though they were going together, so that's why you > mentioned driver... but just to clarify: we talk here only about drivers. > > If reset bindings were accepted, then why they aren't referenced? > > If clock bindings were not accepted, then what is this patch and this > file about? > > > > > On Wed, 10 Jan 2024 at 22:59, Krzysztof Kozlowski > > wrote: > >> > >> On 08/01/2024 14:54, Tomer Maimon wrote: > >>> Replace reg with syscon property since the clock registers handle the > >>> reset registers as well. > >>> > >>> Signed-off-by: Tomer Maimon > >>> --- > >>> .../bindings/clock/nuvoton,npcm845-clk.yaml | 22 +++++++++---------- > >>> 1 file changed, 10 insertions(+), 12 deletions(-) > >>> > >>> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > >>> index 0b642bfce292..c6bf05c163b4 100644 > >>> --- a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > >>> +++ b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > >>> @@ -18,8 +18,9 @@ properties: > >>> enum: > >>> - nuvoton,npcm845-clk > >>> > >>> - reg: > >>> - maxItems: 1 > >>> + nuvoton,sysclk: > >>> + $ref: /schemas/types.yaml#/definitions/phandle > >>> + description: phandle to access clock registers. > >> > >> NAK. Not explained, not justified, not reasonable, breaking ABI. > > Should I explain more in the commit message or/and the nuvoton,sysclk property? > > Let's try to explain here first. I really do not understand why do you > change this binding. Your device did not change, so your binding should > not. Now, if you say "but I changed drivers", then it does not matter. > Bindings do not change because you did something in the drivers, in > general. At least they should not. The confusion here is because the clock binding was upstreamed but the clock driver has not upstreamed yet. The clock driver will use regmap and ioremap so reg property is not needed, should I remove it? or leave it? > > Best regards, > Krzysztof > Best regards, Tomer