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Date: Mon, 22 Jan 2024 19:57:49 +0100
From: =?UTF-8?Q?Rafa=C5=82_Mi=C5=82ecki?= <rafal@milecki.pl>
To: dregan@broadcom.com, miquel.raynal@bootlin.com
Cc: dregan@mail.com, miquel.raynal@bootlin.com, richard@nod.at,
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Subject: Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca
 SoCs
In-Reply-To: <20240118195356.133391-2-dregan@broadcom.com>
References: <20240118195356.133391-1-dregan@broadcom.com>
 <20240118195356.133391-2-dregan@broadcom.com>
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On 2024-01-18 20:53, dregan@broadcom.com wrote:
> @@ -111,6 +113,17 @@ properties:
>        earlier versions of this core that include WP
>      type: boolean
> 
> +  brcm,nand-use-wp:
> +    description:
> +      Use this property to indicate if board design uses
> +      controller's write protection feature and connects its
> +      NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
> +      use this feature when this property does not exist.
> +      Set to 0 if WP pins are not connected and feature is not
> +      used. Set to 1 if WP pins are connected and feature is used.
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1]
> +
>  patternProperties:
>    "^nand@[a-f0-9]$":
>      type: object

Please take a look at:
[PATCH 1/2] dt-bindings: mtd: brcmnand: add "no-wp" property
https://lore.kernel.org/linux-mtd/20211109115215.5bcef0db@xps13/T/

Miquel suggested a generic property applicable to all raw NANDs for
such purpose. Unfortunately I dropped the ball on that.

-- 
Rafał Miłecki