Received-SPF: pass (google.com: domain of linux-kernel+bounces-34062-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1;
Precedence: bulk
MIME-Version: 1.0
References: <20240119113319.54158-1-mario.limonciello@amd.com> <CAAE01kHEperoassBmLwM3pWhJmWpjRS2fcE8VPkLAgvz7yAuQA@mail.gmail.com>
In-Reply-To: <CAAE01kHEperoassBmLwM3pWhJmWpjRS2fcE8VPkLAgvz7yAuQA@mail.gmail.com>
From: "Rafael J. Wysocki" <rafael@kernel.org>
Date: Mon, 22 Jan 2024 20:37:13 +0100
Message-ID: <CAJZ5v0jXvjaC5niHqSxQyc+QnEj=gf+vgKrjjhdFkTgQrPHb3Q@mail.gmail.com>
Subject: Re: [PATCH] cpufreq/amd-pstate: Fix setting scaling max/min freq values
To: Wyes Karny <wkarny@gmail.com>, Mario Limonciello <mario.limonciello@amd.com>
Cc: ray.huang@amd.com, rafael@kernel.org, viresh.kumar@linaro.org, 
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, 
	stable@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

On Mon, Jan 22, 2024 at 3:57=E2=80=AFPM Wyes Karny <wkarny@gmail.com> wrote=
:
>
> On Sat, Jan 20, 2024 at 5:49=E2=80=AFAM Mario Limonciello
> <mario.limonciello@amd.com> wrote:
> >
> > Scaling min/max freq values were being cached and lagging a setting
> > each time.  Fix the ordering of the clamp call to ensure they work.
> >
> > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D217931
> > Cc: stable@vger.kernel.org
> > Cc: wkarny@gmail.com
> > Fixes: febab20caeba ("cpufreq/amd-pstate: Fix scaling_min_freq and scal=
ing_max_freq update")
> > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
>
> Reviewed-by: Wyes Karny <wkarny@gmail.com>
>
> > ---
> >  drivers/cpufreq/amd-pstate.c | 7 +++----
> >  1 file changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.=
c
> > index 1f6186475715..1791d37fbc53 100644
> > --- a/drivers/cpufreq/amd-pstate.c
> > +++ b/drivers/cpufreq/amd-pstate.c
> > @@ -1232,14 +1232,13 @@ static void amd_pstate_epp_update_limit(struct =
cpufreq_policy *policy)
> >         max_limit_perf =3D div_u64(policy->max * cpudata->highest_perf,=
 cpudata->max_freq);
> >         min_limit_perf =3D div_u64(policy->min * cpudata->highest_perf,=
 cpudata->max_freq);
> >
> > +       WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
> > +       WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
> > +
> >         max_perf =3D clamp_t(unsigned long, max_perf, cpudata->min_limi=
t_perf,
> >                         cpudata->max_limit_perf);
> >         min_perf =3D clamp_t(unsigned long, min_perf, cpudata->min_limi=
t_perf,
> >                         cpudata->max_limit_perf);
> > -
> > -       WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
> > -       WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
> > -
> >         value =3D READ_ONCE(cpudata->cppc_req_cached);
> >
> >         if (cpudata->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE)
> > --

Applied as 6.8-rc material, thanks!