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Date: Tue, 23 Jan 2024 08:42:01 +0100
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Subject: Re: [PATCH v4 3/3] arm64: dts: imx93: Add phyBOARD-Segin-i.MX93
 support
To: Wadim Egorov <w.egorov@phytec.de>, Mathieu Othacehe <othacehe@gnu.org>,
 Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
 Sascha Hauer <s.hauer@pengutronix.de>,
 Pengutronix Kernel Team <kernel@pengutronix.de>,
 Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>,
 Li Yang <leoyang.li@nxp.com>, Primoz Fiser <primoz.fiser@norik.com>,
 Christoph Stoidner <c.stoidner@phytec.de>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org
References: <20240122095306.14084-1-othacehe@gnu.org>
 <20240122095306.14084-4-othacehe@gnu.org>
 <537266fe-0bf7-4208-a9f3-ae27f462c6ed@phytec.de>
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From: Stefan Wahren <wahrenst@gmx.net>
In-Reply-To: <537266fe-0bf7-4208-a9f3-ae27f462c6ed@phytec.de>
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Hi Wadim,

Am 23.01.24 um 07:11 schrieb Wadim Egorov:
> Hey Mathieu,
>
> Am 22.01.24 um 10:53 schrieb Mathieu Othacehe:
>> Add basic support for phyBOARD-Segin-i.MX93.
>> Main features are:
>> * eMMC
>> * Ethernet
>> * SD-Card
>> * UART
>>
>> Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
>> ---
>> =C2=A0 arch/arm64/boot/dts/freescale/Makefile=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 1 +
>> =C2=A0 .../dts/freescale/imx93-phyboard-segin.dts=C2=A0=C2=A0=C2=A0 | 1=
41 ++++++++++++++++++
>> =C2=A0 .../boot/dts/freescale/imx93-phycore-som.dtsi | 127 ++++++++++++=
++++
>> =C2=A0 3 files changed, 269 insertions(+)
>> =C2=A0 create mode 100644
>> arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> =C2=A0 create mode 100644
>> arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/freescale/Makefile
>> b/arch/arm64/boot/dts/freescale/Makefile
>> index 2e027675d7bb..65db918c821c 100644
>> --- a/arch/arm64/boot/dts/freescale/Makefile
>> +++ b/arch/arm64/boot/dts/freescale/Makefile
>> @@ -201,6 +201,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D
>> imx8qxp-colibri-iris-v2.dtb
>> =C2=A0 dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-mek.dtb
>> =C2=A0 dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-evk.dtb
>> =C2=A0 dtb-$(CONFIG_ARCH_MXC) +=3D imx93-11x11-evk.dtb
>> +dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin.dtb
>> =C2=A0 dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxca.dtb
>> =C2=A0 dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxla.dtb
>> =C2=A0 diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.=
dts
>> b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> new file mode 100644
>> index 000000000000..5433c33d1322
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> @@ -0,0 +1,141 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
>> + * Author: Wadim Egorov <w.egorov@phytec.de>, Christoph Stoidner
>> <c.stoidner@phytec.de>
>> + * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com>
>> + *
>> + * Product homepage:
>> + * phyBOARD-Segin carrier board is reused for the i.MX93 design.
>> + *
>> https://www.phytec.de/produkte/single-board-computer/phyboard-segin-imx=
6ul/
>> + */
>> +
>> +#include "imx93-phycore-som.dtsi"
>> +
>> +/{
>> +=C2=A0=C2=A0=C2=A0 model =3D "PHYTEC phyBOARD-Segin-i.MX93";
>> +=C2=A0=C2=A0=C2=A0 compatible =3D "phytec,imx93-phyboard-segin",
>> "phytec,imx93-phycore-som",
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0 "fsl,imx93";
>> +
>> +=C2=A0=C2=A0=C2=A0 chosen {
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 stdout-path =3D &lpuart1;
>> +=C2=A0=C2=A0=C2=A0 };
>> +
>> +=C2=A0=C2=A0=C2=A0 reg_usdhc2_vmmc: regulator-usdhc2 {
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 compatible =3D "regulator-f=
ixed";
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 enable-active-high;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 gpio =3D <&gpio3 7 GPIO_ACT=
IVE_HIGH>;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pinctrl-names =3D "default"=
;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pinctrl-0 =3D <&pinctrl_reg=
_usdhc2_vmmc>;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 regulator-min-microvolt =3D=
 <3300000>;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 regulator-max-microvolt =3D=
 <3300000>;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 regulator-name =3D "VCC_SD"=
;
>> +=C2=A0=C2=A0=C2=A0 };
>> +};
>> +
>> +/* GPIOs */
>> +&gpio1 {
>> +=C2=A0=C2=A0=C2=A0 pinctrl-names =3D "default";
>> +=C2=A0=C2=A0=C2=A0 pinctrl-0 =3D <&pinctrl_gpio1>;
>
> You are doing more than you describing in your changes log.
> Here you are forcing a gpio-only functionality for the X16 header. But
> the pins we route down to the X16 expansion connector can be also used
> differently.

i think the word "forcing" is little bit hard in this case. It doesn't
define a gpio-hog.

> Typically we provide device tree overlays for different use cases on
> this expansion connectors.

Can you please explain why the device tree overlays cannot overwrite the
pinmuxing?

>
> Please drop the muxing.
>
> Same applies for the gpio names.
What's the problem with defining gpio line names for user friendliness?
The Raspberry Pi has also an expansion header, all the pins can be muxed
to different functions but still have gpio line names.

Best regards