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From: Furong Xu <0x1207@gmail.com>
To: "David S. Miller" <davem@davemloft.net>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Jose Abreu <joabreu@synopsys.com>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>,
	Paolo Abeni <pabeni@redhat.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Joao Pinto <jpinto@synopsys.com>,
	Simon Horman <horms@kernel.org>
Cc: netdev@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	xfr@outlook.com,
	rock.xu@nio.com,
	Furong Xu <0x1207@gmail.com>
Subject: [PATCH net] net: stmmac: xgmac: fix safety error descriptions
Date: Tue, 23 Jan 2024 16:50:37 +0800
Message-Id: <20240123085037.939471-1-0x1207@gmail.com>
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Commit 56e58d6c8a56 ("net: stmmac: Implement Safety Features in
XGMAC core") prints safety error descriptions when safety error assert,
but missed some special errors, and mixed correctable errors and
uncorrectable errors together.
This patch complete the error code list and print the type of errors.

Fixes: 56e58d6c8a56 ("net: stmmac: Implement Safety Features in XGMAC core")
Signed-off-by: Furong Xu <0x1207@gmail.com>
---
 .../ethernet/stmicro/stmmac/dwxgmac2_core.c   | 36 +++++++++----------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
index eb48211d9b0e..ad812484059e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
@@ -748,29 +748,29 @@ static void dwxgmac3_handle_mac_err(struct net_device *ndev,
 }
 
 static const struct dwxgmac3_error_desc dwxgmac3_mtl_errors[32]= {
-	{ true, "TXCES", "MTL TX Memory Error" },
+	{ true, "TXCES", "MTL TX Memory Correctable Error" },
 	{ true, "TXAMS", "MTL TX Memory Address Mismatch Error" },
-	{ true, "TXUES", "MTL TX Memory Error" },
+	{ true, "TXUES", "MTL TX Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 3 */
-	{ true, "RXCES", "MTL RX Memory Error" },
+	{ true, "RXCES", "MTL RX Memory Correctable Error" },
 	{ true, "RXAMS", "MTL RX Memory Address Mismatch Error" },
-	{ true, "RXUES", "MTL RX Memory Error" },
+	{ true, "RXUES", "MTL RX Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 7 */
-	{ true, "ECES", "MTL EST Memory Error" },
+	{ true, "ECES", "MTL EST Memory Correctable Error" },
 	{ true, "EAMS", "MTL EST Memory Address Mismatch Error" },
-	{ true, "EUES", "MTL EST Memory Error" },
+	{ true, "EUES", "MTL EST Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 11 */
-	{ true, "RPCES", "MTL RX Parser Memory Error" },
+	{ true, "RPCES", "MTL RX Parser Memory Correctable Error" },
 	{ true, "RPAMS", "MTL RX Parser Memory Address Mismatch Error" },
-	{ true, "RPUES", "MTL RX Parser Memory Error" },
+	{ true, "RPUES", "MTL RX Parser Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 15 */
-	{ false, "UNKNOWN", "Unknown Error" }, /* 16 */
-	{ false, "UNKNOWN", "Unknown Error" }, /* 17 */
-	{ false, "UNKNOWN", "Unknown Error" }, /* 18 */
+	{ true, "SCES", "MTL SGF GCL Memory Correctable Error" },
+	{ true, "SAMS", "MTL SGF GCL Memory Address Mismatch Error" },
+	{ true, "SUES", "MTL SGF GCL Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 19 */
-	{ false, "UNKNOWN", "Unknown Error" }, /* 20 */
-	{ false, "UNKNOWN", "Unknown Error" }, /* 21 */
-	{ false, "UNKNOWN", "Unknown Error" }, /* 22 */
+	{ true, "RXFCES", "MTL RXF Memory Correctable Error" },
+	{ true, "RXFAMS", "MTL RXF Memory Address Mismatch Error" },
+	{ true, "RXFUES", "MTL RXF Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 23 */
 	{ false, "UNKNOWN", "Unknown Error" }, /* 24 */
 	{ false, "UNKNOWN", "Unknown Error" }, /* 25 */
@@ -796,13 +796,13 @@ static void dwxgmac3_handle_mtl_err(struct net_device *ndev,
 }
 
 static const struct dwxgmac3_error_desc dwxgmac3_dma_errors[32]= {
-	{ true, "TCES", "DMA TSO Memory Error" },
+	{ true, "TCES", "DMA TSO Memory Correctable Error" },
 	{ true, "TAMS", "DMA TSO Memory Address Mismatch Error" },
-	{ true, "TUES", "DMA TSO Memory Error" },
+	{ true, "TUES", "DMA TSO Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 3 */
-	{ true, "DCES", "DMA DCACHE Memory Error" },
+	{ true, "DCES", "DMA DCACHE Memory Correctable Error" },
 	{ true, "DAMS", "DMA DCACHE Address Mismatch Error" },
-	{ true, "DUES", "DMA DCACHE Memory Error" },
+	{ true, "DUES", "DMA DCACHE Memory Uncorrectable Error" },
 	{ false, "UNKNOWN", "Unknown Error" }, /* 7 */
 	{ false, "UNKNOWN", "Unknown Error" }, /* 8 */
 	{ false, "UNKNOWN", "Unknown Error" }, /* 9 */
-- 
2.34.1