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From: Vinod Koul <vkoul@kernel.org>
To: bvanassche@acm.org, mani@kernel.org, abel.vesa@linaro.org, 
 dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org, 
 Can Guo <quic_cang@quicinc.com>
Cc: linux-phy@lists.infradead.org, linux-arm-msm@vger.kernel.org, 
 linux-kernel@vger.kernel.org, Andy Gross <agross@kernel.org>, 
 Bjorn Andersson <andersson@kernel.org>, 
 Konrad Dybcio <konrad.dybcio@linaro.org>, 
 Kishon Vijay Abraham I <kishon@kernel.org>
In-Reply-To: <1703557892-1822-1-git-send-email-quic_cang@quicinc.com>
References: <1703557892-1822-1-git-send-email-quic_cang@quicinc.com>
Subject: Re: [PATCH v10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed
 Gear 5 support for SM8550
Message-Id: <170601964819.371263.15091699444243668502.b4-ty@kernel.org>
Date: Tue, 23 Jan 2024 19:50:48 +0530
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On Mon, 25 Dec 2023 18:31:30 -0800, Can Guo wrote:
> On SM8550, two sets of UFS PHY settings are provided, one set is to support
> HS-G5, another set is to support HS-G4 and lower gears. The two sets of PHY
> settings are programming different values to different registers, mixing
> the two sets and/or overwriting one set with another set is definitely not
> blessed by UFS PHY designers.
> 
> To add HS-G5 support for SM8550, split the two sets of PHY settings into
> their dedicated overlay tables, only the common parts of the two sets of
> PHY settings are left in the .tbls.
> 
> [...]

Applied, thanks!

[1/1] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550
      commit: b34ae8598c9c3a95e7f8eaeaa1fcf6fdba0aef68

Best regards,
-- 
~Vinod