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Message-ID: <b0f4236a-c87e-4d50-b1a0-42ed5b015b86@linaro.org>
Date: Tue, 23 Jan 2024 19:09:37 +0100
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Subject: Re: [PATCH v4 05/11] arm64: dts: qcom: x1e80100: Add TCSR node
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To: Abel Vesa <abel.vesa@linaro.org>, Andy Gross <agross@kernel.org>,
 Bjorn Andersson <andersson@kernel.org>, Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>, Sibi Sankar <quic_sibis@quicinc.com>,
 Rajendra Nayak <quic_rjendra@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org
References: <20240123-x1e80100-dts-missing-nodes-v4-0-072dc2f5c153@linaro.org>
 <20240123-x1e80100-dts-missing-nodes-v4-5-072dc2f5c153@linaro.org>
From: Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <20240123-x1e80100-dts-missing-nodes-v4-5-072dc2f5c153@linaro.org>
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On 1/23/24 12:01, Abel Vesa wrote:
> Add the TCSR clock controller and halt register space node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---

The former - yes, the latter - ?

Konrad
>   arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index be69e71b7f53..2b6c55a486b2 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2606,6 +2606,14 @@ tcsr_mutex: hwlock@1f40000 {
>   			#hwlock-cells = <1>;
>   		};
>   
> +		tcsr: clock-controller@1fc0000 {
> +			compatible = "qcom,x1e80100-tcsr", "syscon";
> +			reg = <0 0x01fc0000 0 0x30000>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +		};
> +
>   		gem_noc: interconnect@26400000 {
>   			compatible = "qcom,x1e80100-gem-noc";
>   			reg = <0 0x26400000 0 0x311200>;
>