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Date: Wed, 24 Jan 2024 18:30:08 +0100
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: David Regan <dregan@broadcom.com>
Cc: dregan@mail.com, richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org,
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Subject: Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND
 controller node
Message-ID: <20240124183008.04a1bcb0@xps-13>
In-Reply-To: <20240124030458.98408-3-dregan@broadcom.com>
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	<20240124030458.98408-3-dregan@broadcom.com>
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Hi David,

dregan@broadcom.com wrote on Tue, 23 Jan 2024 19:04:50 -0800:

> From: William Zhang <william.zhang@broadcom.com>
>=20
> Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts
> files.
>=20
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> Reviewed-by: David Regan <dregan@broadcom.com>
> ---
> Changes in v3: None
> ---
> Changes in v2: None
> ---
>  arch/arm/boot/dts/broadcom/bcm47622.dtsi    | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm63138.dtsi    | 10 +++++++++-
>  arch/arm/boot/dts/broadcom/bcm63148.dtsi    | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm63178.dtsi    | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6756.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6846.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6855.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6878.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm947622.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm963138.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 12 +++++-------
>  arch/arm/boot/dts/broadcom/bcm963148.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm963178.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96756.dts     |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96846.dts     |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96855.dts     |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96878.dts     |  4 ++++
>  17 files changed, 165 insertions(+), 8 deletions(-)
>=20
> diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts=
/broadcom/bcm47622.dtsi
> index 7cd38de118c3..55ff18043d96 100644
> --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
> @@ -138,6 +138,23 @@ hsspi: spi@1000 {
>  			status =3D "disabled";
>  		};
> =20
> +		nand_controller: nand-controller@1800 {
> +			#address-cells =3D <1>;
> +			#size-cells =3D <0>;
> +			compatible =3D "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcm=
nand";
> +			reg =3D <0x1800 0x600>, <0x2000 0x10>;
> +			reg-names =3D "nand", "nand-int-base";
> +			brcm,nand-use-wp =3D <0>;
> +			status =3D "disabled";
> +
> +			nandcs: nand@0 {
> +				compatible =3D "brcm,nandcs";
> +				reg =3D <0>;
> +				nand-on-flash-bbt;
> +				brcm,nand-ecc-use-strap;

Describing the NAND chip in a SoC DTSI does not look relevant to me.
Even more if you add something like this nand-ecc-use-strap setting
which is very board dependent.

Same applies to your arm64 DT patch.

Thanks,
Miqu=C3=A8l