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Wed, 24 Jan 2024 17:38:59 -0800 (PST) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id gb20-20020a056870671400b00214a527781asm710630oab.13.2024.01.24.17.38.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Jan 2024 17:38:58 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Conor Dooley Cc: Tudor Ambarus , Alim Akhtar , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 0/3] arm64: exynos: Enable SPI for Exynos850 Date: Wed, 24 Jan 2024 19:38:55 -0600 Message-Id: <20240125013858.3986-1-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series enables SPI for Exynos850 SoC. The summary: 1. Enable PDMA, it's needed for SPI (dts, clk) 2. Propagate SPI src clock rate change up to DIV clocks, to make it possible to change SPI frequency (clk driver) 3. Add SPI nodes to Exynos850 SoC dtsi All SPI instances were tested using `spidev_test' tool in all 3 possible modes: - Polling mode: xfer_size <= 32 - IRQ mode: 64 >= xfer_size >= 32 - DMA mode: xfer_size > 64 with 200 kHz ... 49.9 MHz SPI frequencies. The next 3 approaches were used: 1. Software loopback ('-l' option for `spidev_test' tool) 2. Hardware loopback (by connecting MISO line to MOSI) 3. By communicating with ATMega found on Sensors Mezzanine board [1], programmed to act as an SPI slave device and all the transactions were additionally checked on my Logic Analyzer to make sure the SCK frequencies were actually correct. This series is supposed to go via Krzysztof's tree. SPI driver additions and corresponding bindings will be submitted in a separate series and are independent from this one. Changes in v2: - Fixed indentation in clk patch to make checkpatch strict happy - Ordered PDMA node by unit address - Sorted pinctrl properties properly [1] https://www.96boards.org/product/sensors-mezzanine/ [2] https://lore.kernel.org/all/20240120012948.8836-1-semen.protsenko@linaro.org/ Sam Protsenko (3): clk: samsung: exynos850: Propagate SPI IPCLK rate change arm64: dts: exynos: Add PDMA node for Exynos850 arm64: dts: exynos: Add SPI nodes for Exynos850 arch/arm64/boot/dts/exynos/exynos850.dtsi | 64 +++++++++++++++++++++++ drivers/clk/samsung/clk-exynos850.c | 33 ++++++------ 2 files changed, 81 insertions(+), 16 deletions(-) -- 2.39.2