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Wed, 24 Jan 2024 19:09:27 -0800 (PST) Received: from [192.168.52.129] ([192.19.222.250]) by smtp.gmail.com with ESMTPSA id nh12-20020a056214390c00b0068174386320sm5108228qvb.19.2024.01.24.19.09.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jan 2024 19:09:26 -0800 (PST) Message-ID: <2c10a764-f74f-45b2-8bba-77c40468f4b5@broadcom.com> Date: Wed, 24 Jan 2024 19:09:23 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node To: Miquel Raynal , David Regan Cc: dregan@mail.com, richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, computersforpeace@gmail.com, kdasu.kdev@gmail.com, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, joel.peshkin@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, anand.gore@broadcom.com, kursad.oney@broadcom.com, florian.fainelli@broadcom.com, rafal@milecki.pl, bcm-kernel-feedback-list@broadcom.com, andre.przywara@arm.com, baruch@tkos.co.il, linux-arm-kernel@lists.infradead.org, dan.carpenter@linaro.org References: <20240124030458.98408-1-dregan@broadcom.com> <20240124030458.98408-3-dregan@broadcom.com> <20240124183008.04a1bcb0@xps-13> From: William Zhang In-Reply-To: <20240124183008.04a1bcb0@xps-13> Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000e4514c060fbc813b" --000000000000e4514c060fbc813b Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Miquel, On 1/24/24 09:30, Miquel Raynal wrote: > Hi David, > > dregan@broadcom.com wrote on Tue, 23 Jan 2024 19:04:50 -0800: > >> From: William Zhang >> >> Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts >> files. >> >> Signed-off-by: William Zhang >> Reviewed-by: David Regan >> --- >> Changes in v3: None >> --- >> Changes in v2: None >> --- >> arch/arm/boot/dts/broadcom/bcm47622.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm63138.dtsi | 10 +++++++++- >> arch/arm/boot/dts/broadcom/bcm63148.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm63178.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm6756.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm6846.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm6855.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm6878.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/broadcom/bcm947622.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm963138.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 12 +++++------- >> arch/arm/boot/dts/broadcom/bcm963148.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm963178.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm96756.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm96846.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm96855.dts | 4 ++++ >> arch/arm/boot/dts/broadcom/bcm96878.dts | 4 ++++ >> 17 files changed, 165 insertions(+), 8 deletions(-) >> >> diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts/broadcom/bcm47622.dtsi >> index 7cd38de118c3..55ff18043d96 100644 >> --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi >> +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi >> @@ -138,6 +138,23 @@ hsspi: spi@1000 { >> status = "disabled"; >> }; >> >> + nand_controller: nand-controller@1800 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; >> + reg = <0x1800 0x600>, <0x2000 0x10>; >> + reg-names = "nand", "nand-int-base"; >> + brcm,nand-use-wp = <0>; >> + status = "disabled"; >> + >> + nandcs: nand@0 { >> + compatible = "brcm,nandcs"; >> + reg = <0>; >> + nand-on-flash-bbt; >> + brcm,nand-ecc-use-strap; > > Describing the NAND chip in a SoC DTSI does not look relevant to me. > Even more if you add something like this nand-ecc-use-strap setting > which is very board dependent. > I am not sure if I understand you comments correctly but are you suggesting to put this whole nand controller node into each board dts? We have other ip block nodes like SPI, uart in this same soc dtsi file too. For all the bcmbca soc dtsi I am updating here(and its board design), we always use the strap to for ecc setting. So I thought it should be okay to put brcm,nand-ecc-use-strap in the default dtsi file. For any board that uses the raw nand nand-ecc property, the board dts can do so and override the brcm,nand-ecc-use-strap setting. > Same applies to your arm64 DT patch. > > Thanks, > Miquèl --000000000000e4514c060fbc813b Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIIQcAYJKoZIhvcNAQcCoIIQYTCCEF0CAQExDzANBglghkgBZQMEAgEFADALBgkqhkiG9w0BBwGg gg3HMIIFDTCCA/WgAwIBAgIQeEqpED+lv77edQixNJMdADANBgkqhkiG9w0BAQsFADBMMSAwHgYD VQQLExdHbG9iYWxTaWduIFJvb3QgQ0EgLSBSMzETMBEGA1UEChMKR2xvYmFsU2lnbjETMBEGA1UE AxMKR2xvYmFsU2lnbjAeFw0yMDA5MTYwMDAwMDBaFw0yODA5MTYwMDAwMDBaMFsxCzAJBgNVBAYT AkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBS MyBQZXJzb25hbFNpZ24gMiBDQSAyMDIwMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA vbCmXCcsbZ/a0fRIQMBxp4gJnnyeneFYpEtNydrZZ+GeKSMdHiDgXD1UnRSIudKo+moQ6YlCOu4t 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