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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id z18-20020a2e3512000000b002cd5b233861sm234062ljz.60.2024.01.25.02.56.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Jan 2024 02:56:45 -0800 (PST) Message-ID: <49a98836-b4a1-4654-8b39-7cf095a17d1b@linaro.org> Date: Thu, 25 Jan 2024 11:56:43 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 00/12] Unregister critical branch clocks + some RPM Content-Language: en-US To: Taniya Das , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Johan Hovold , Bryan O'Donoghue References: <20230717-topic-branch_aon_cleanup-v6-0-46d136a4e8d0@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/25/24 11:16, Taniya Das wrote: > Hi Konrad, > > Thanks for your patch. > > On 1/13/2024 8:20 PM, Konrad Dybcio wrote: >> On Qualcomm SoCs, certain branch clocks either need to be always-on, or >> should be if you're interested in touching some part of the hardware. >> >> Using CLK_IS_CRITICAL for this purpose sounds like a genius idea, >> however that messes with the runtime pm handling - if a clock is >> marked as such, the clock controller device will never enter the >> "suspended" state, leaving the associated resources online, which in >> turn breaks SoC-wide suspend. > > I am really curious to know a little more about the SoC-Wide Suspend not happening on these targets. Could you add more details here ? > > The Resource Power Manager (RPM) is the main aggregator on these targets where the active & sleep votes on XO, shared rails (CX/MX) decide the SoC wide suspend. The High Level OS on our internal platforms never had any suspend issues due to clocks(GCC/GPUCC) or shared rails being kept enabled from the consumers. With the common clock framework, CLK_IS_CRITICAL blocks pm operations, as clk_disable fails at some point. Since RPM(h)PDs are modeled as pmdomains, this in turn results in them never getting disabled, leading to outstanding votes. Then, RPM(h) sees these votes and (among other things which are not properly described on most SoCs leading to dangling votes) decides that CXPD/XOSD/AOSD can't be entered because there's a request on a resource. > >> >> This series aims to solve that on a couple SoCs that I could test the >> changes on and it sprinkles some runtime pm enablement atop these drivers. >> > > As CX is a shared resource/rail on these specific targets we definitely do not achieve any power saving with the runtime pm attached to these clock controllers, but I see a little more SW overhead. Though you could please add your observations/comments. Hm, simply adding a power-domains entry to denote the required performance state values when voting for downstream GDSCs would be enough and runtime PM only makes sense if there's an additional rail, say MMCX or GFX. But see the comment below. > > Removing the CLK_IS_CRITICAL is a good cleanup and moving them to probe is a good way to handle the always-on clocks. Unless it turns out to be really messy with keeping backwards DTS compatibilty, the goal is to use the pm_clk APIs to only keep the interface/xo/sleep clocks for subsystems active when that subsystem is active (i.e. when SUBSYS_CC is *runtime-active*). This will result in a treewide patchset. Konrad