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Date: Thu, 25 Jan 2024 12:32:24 +0200
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
To: =?iso-8859-1?Q?Andr=E9?= Almeida <andrealmeid@igalia.com>
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, kernel-dev@igalia.com,
	alexander.deucher@amd.com, christian.koenig@amd.com,
	Simon Ser <contact@emersion.fr>,
	Pekka Paalanen <ppaalanen@gmail.com>, daniel@ffwll.ch,
	Daniel Stone <daniel@fooishbar.org>,
	'Marek =?utf-8?B?T2zFocOhayc=?= <maraeo@gmail.com>,
	Dave Airlie <airlied@gmail.com>, Xaver Hugl <xaver.hugl@gmail.com>,
	Joshua Ashton <joshua@froggi.es>,
	Michel =?iso-8859-1?Q?D=E4nzer?= <michel.daenzer@mailbox.org>
Subject: Re: [PATCH v2 2/2] drm/amdgpu: Implement check_async_props for planes
Message-ID: <ZbI4uD3iK-CChNlz@intel.com>
References: <20240119181235.255060-1-andrealmeid@igalia.com>
 <20240119181235.255060-3-andrealmeid@igalia.com>
 <Zaq-r7UZpEy7_Rrn@intel.com>
 <68171ce1-3ccb-4699-8577-434d9b717acf@igalia.com>
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In-Reply-To: <68171ce1-3ccb-4699-8577-434d9b717acf@igalia.com>

On Wed, Jan 24, 2024 at 11:14:40AM -0300, Andr? Almeida wrote:
> Hi Ville,
> 
> Em 19/01/2024 15:25, Ville Syrj?l? escreveu:
> > On Fri, Jan 19, 2024 at 03:12:35PM -0300, Andr? Almeida wrote:
> >> AMD GPUs can do async flips with changes on more properties than just
> >> the FB ID, so implement a custom check_async_props for AMD planes.
> >>
> >> Allow amdgpu to do async flips with IN_FENCE_ID and FB_DAMAGE_CLIPS
> >> properties. For userspace to check if a driver support this two
> >> properties, the strategy for now is to use TEST_ONLY commits.
> >>
> >> Signed-off-by: Andr? Almeida <andrealmeid@igalia.com>
> >> ---
> >> v2: Drop overlay plane option for now
> >>
> >>   .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   | 29 +++++++++++++++++++
> >>   1 file changed, 29 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> >> index 116121e647ca..7afe8c1b62d4 100644
> >> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> >> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> >> @@ -25,6 +25,7 @@
> >>    */
> >>   
> >>   #include <drm/drm_atomic_helper.h>
> >> +#include <drm/drm_atomic_uapi.h>
> >>   #include <drm/drm_blend.h>
> >>   #include <drm/drm_gem_atomic_helper.h>
> >>   #include <drm/drm_plane_helper.h>
> >> @@ -1430,6 +1431,33 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane,
> >>   	drm_atomic_helper_plane_destroy_state(plane, state);
> >>   }
> >>   
> >> +static int amdgpu_dm_plane_check_async_props(struct drm_property *prop,
> >> +					  struct drm_plane *plane,
> >> +					  struct drm_plane_state *plane_state,
> >> +					  struct drm_mode_object *obj,
> >> +					  u64 prop_value, u64 old_val)
> >> +{
> >> +	struct drm_mode_config *config = &plane->dev->mode_config;
> >> +	int ret;
> >> +
> >> +	if (prop != config->prop_fb_id &&
> >> +	    prop != config->prop_in_fence_fd &&
> > 
> > IN_FENCE should just be allowed always.
> 
> Do you mean that the common path should allow IN_FENCE_FD for all drivers?

Yes.

-- 
Ville Syrj?l?
Intel