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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id h4-20020a056512350400b0050eebe0b7d2sm2931938lfs.183.2024.01.25.08.33.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Jan 2024 08:33:21 -0800 (PST) Message-ID: <554d8d03-fa8f-476e-97a0-96d1ecc8e158@linaro.org> Date: Thu, 25 Jan 2024 17:33:20 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] arm64: dts: qcom: sm8150: describe all PCI MSI interrupts Content-Language: en-US To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240125130626.390850-1-krzysztof.kozlowski@linaro.org> From: Konrad Dybcio In-Reply-To: <20240125130626.390850-1-krzysztof.kozlowski@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/25/24 14:06, Krzysztof Kozlowski wrote: > Each group of MSI interrupts is mapped to the separate host interrupt. > Describe each of interrupts in the device tree for PCIe hosts. Not > tested on hardware. > > Signed-off-by: Krzysztof Kozlowski > > --- There's no cover letter, so I can't batch a-b.. Could you please resend, turning interrupt-names into a vertical list? Konrad