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Message-ID: <1792a925-172f-4a9e-ad59-dea474bc7cda@intel.com>
Date: Thu, 25 Jan 2024 13:03:06 -0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 2/2] tracing: Include Microcode Revision in mce_record
 tracepoint
Content-Language: en-US
To: Avadhut Naik <avadhut.naik@amd.com>, <linux-trace-kernel@vger.kernel.org>,
	<linux-edac@vger.kernel.org>
CC: <rostedt@goodmis.org>, <tony.luck@intel.com>, <bp@alien8.de>,
	<x86@kernel.org>, <linux-kernel@vger.kernel.org>, <yazen.ghannam@amd.com>,
	<avadnaik@amd.com>
References: <20240125184857.851355-1-avadhut.naik@amd.com>
 <20240125184857.851355-3-avadhut.naik@amd.com>
From: Sohil Mehta <sohil.mehta@intel.com>
In-Reply-To: <20240125184857.851355-3-avadhut.naik@amd.com>
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 =?utf-8?B?VkEyS1dCdExYNU42bkZwQmE2UGVhYTNsZ0JLcGk5dUZISnJ6enBENllHRmZU?=
 =?utf-8?B?SmhEK1JFdDVITjFqWlFaa3FkaTRCNXdtTG9Pd0NiUUpvVVZFWUhrQjBQUVJz?=
 =?utf-8?B?MExtTUVMQmlGMkJqRzE1R1c5OVE5TWJlcFVDQzFwUG04YlJWa1JtWVlRY2h6?=
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 =?utf-8?B?VWpkdTc4RU4xVmptM29IYzNJSnZTZjgwR3lXajM2d3RBSkZ1YmI3WCs1NG10?=
 =?utf-8?B?SEhzZzlUQ0F3UzVudERVYTg4Zk5TNFhXWHpVTTlJVDgzTXlxcnM1QmVNSmI3?=
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On 1/25/2024 10:48 AM, Avadhut Naik wrote:
> Currently, the microcode field (Microcode Revision) of struct mce is not
> exported to userspace through the mce_record tracepoint.
> 
> Export it through the tracepoint as it may provide useful information for
> debug and analysis.
> 
> Signed-off-by: Avadhut Naik <avadhut.naik@amd.com>
> ---

A couple of nits below.

Apart from that the patch looks fine to me.

Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>

>  include/trace/events/mce.h | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/include/trace/events/mce.h b/include/trace/events/mce.h
> index 657b93ec8176..203baccd3c5c 100644
> --- a/include/trace/events/mce.h
> +++ b/include/trace/events/mce.h
> @@ -34,6 +34,7 @@ TRACE_EVENT(mce_record,
>  		__field(	u8,		cs		)
>  		__field(	u8,		bank		)
>  		__field(	u8,		cpuvendor	)
> +		__field(	u32,	microcode	)

Tab alignment is inconsistent.

>  	),
>  
>  	TP_fast_assign(
> @@ -55,9 +56,10 @@ TRACE_EVENT(mce_record,
>  		__entry->cs		= m->cs;
>  		__entry->bank		= m->bank;
>  		__entry->cpuvendor	= m->cpuvendor;
> +		__entry->microcode	= m->microcode;
>  	),
>  
> -	TP_printk("CPU: %d, MCGc/s: %llx/%llx, MC%d: %016Lx, IPID: %016Lx, ADDR/MISC/SYND: %016Lx/%016Lx/%016Lx, RIP: %02x:<%016Lx>, TSC: %llx, PPIN: %llx, PROCESSOR: %u:%x, TIME: %llu, SOCKET: %u, APIC: %x",
> +	TP_printk("CPU: %d, MCGc/s: %llx/%llx, MC%d: %016Lx, IPID: %016Lx, ADDR/MISC/SYND: %016Lx/%016Lx/%016Lx, RIP: %02x:<%016Lx>, TSC: %llx, PPIN: %llx, PROCESSOR: %u:%x, TIME: %llu, SOCKET: %u, APIC: %x, MICROCODE REVISION: %u",

Should microcode by printed as a decimal or an hexadecimal? Elsewhere
such as __print_mce(), it is printed as an hexadecimal:

        /*
         * Note this output is parsed by external tools and old fields
         * should not be changed.
         */
        pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x
microcode %x\n",
                m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
                m->microcode);


>  		__entry->cpu,
>  		__entry->mcgcap, __entry->mcgstatus,
>  		__entry->bank, __entry->status,
> @@ -69,7 +71,8 @@ TRACE_EVENT(mce_record,
>  		__entry->cpuvendor, __entry->cpuid,
>  		__entry->walltime,
>  		__entry->socketid,
> -		__entry->apicid)
> +		__entry->apicid,
> +		__entry->microcode)
>  );
>  
>  #endif /* _TRACE_MCE_H */