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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?pjB8YFvyGaLMiVir5NaA9AQrom7fJXVkWZkvJ12mFgiLRDK79OXAMWtVAoQd?= =?us-ascii?Q?UVOLjl2pXjdCYqDBgz0AidGasQB89kRezTPzWpcW0vI7KALmlGykDY/XMOC3?= =?us-ascii?Q?OUjkHKNcdhi5RBHfkUXY8NV9g1o2fBSwK76SqsM2DE1hGSKIcuLpcWz4zm/A?= =?us-ascii?Q?O7TjrAWvaRSWele+NXaQ4ZpIePFJoWbWSPaDj/f5ekj8OcxJQGSQrbZ1f2BM?= =?us-ascii?Q?1E+YKteY9moCnNb/66/PB8zoWdgnqcOWddPNQqX1E6EpAHaQ+YVEwqAF4UMj?= =?us-ascii?Q?Lpmhy+jl+O76c5tEYJCHFyKitK5UKHAxSNHEDZQ+NAToZeGjSOAw8p7vDJyv?= =?us-ascii?Q?H+gZc1+aZB8F73Qk1HNi2hhw+sZbgOGE3EWg70OHoU7yNpHFiM2hDpxcHIuH?= =?us-ascii?Q?EqHJHBXPDJgLRaBEJYTG7gWMhVlsYjRYADAxcgVpHdxT2wBCqBzoub/YKk5D?= =?us-ascii?Q?H/SFQSjTFlBoJd/O+KGNzuqXWTlSXBUy+xD+8iS787FR6VuZIe+/arqfinTR?= =?us-ascii?Q?NCRCpY3zS0AP3IkkylYnuMBuM3HrqL40B71tx5ocFGzcpa2lxAEoaLmrD94L?= =?us-ascii?Q?fXm4bpIeIwv/5ED5A6owYdGqFdh7CqdD9kjQdeLiKRxTkOCnG4qdtBzmh4Na?= =?us-ascii?Q?AqF+KT3Iz10G8XjKsF+FDtneNLgLiJD+XcKatuegLTrXuncQ2qMcxsERLexx?= =?us-ascii?Q?0FS30AxaNVW5Y9xYApdBrWbpiOCnnYqNkygWXiLfLQDDOJh4a2tCT07cXHxk?= =?us-ascii?Q?+Eyojar3qyPTLxgkKBnG9yZfk8XxGtHXAeWGje0AC/pWYptQjd/yfDIMNo9+?= =?us-ascii?Q?ekbw+WrghyqQ6ONC+wNj7QimO4VeosCAshPS2XpRKvw+m+2QB2Z7ccy2njqE?= =?us-ascii?Q?MxVq38ioOoV4buNF/AUi0Zcb745pqNCJVADkzHGgSCPTIHgapSMQ1W2A+oTt?= =?us-ascii?Q?77yzdAtsyjLy7xTBncdSgCvmNCiWImQqG45WgZZEm1ufCvUYP87YL9PTXWps?= =?us-ascii?Q?qNwZKGPOzQxMSVaTIqTs1lLI1yNuCf76KqvpK+yurZSB2ydstHzFvOee6WU1?= =?us-ascii?Q?zqZaV0bzrUBpSGGoiwstrSR678TXMHbqQTBn+9LNGEcs7svTtlwa5AEeipwI?= =?us-ascii?Q?WMdcnzWAJEBcamUFy16xGCNgcx86IDbSWDNfSy8rgfzFpU8ARv8JCOm/Yyxv?= =?us-ascii?Q?h6PXgLEu65+EleVqAEUg0XndRApD9fJ+rnqARPk01B6lzKz0o7gBHu6HI3Tg?= =?us-ascii?Q?L8zEbIci2t0qKjiWi89Nq8Qh86ycaPQARvlR45moHSvznAU9fY/FqXXmbWOj?= =?us-ascii?Q?SvXnTFiOzLiMdPxEGcbeopVuZ8YrInE00o1g02Rm/CK1aNjFmdkHy+zcvp3q?= =?us-ascii?Q?XhzVcHBUyzt4dQp5P9dJeSFrb1evC5ObYMIyKSSepfWZXeFVlPN+mb4kiL9K?= =?us-ascii?Q?dD43ja/Ak6Nl8NGNczfX+A5yYHm4GDa1yQkV01zqlZjxVy93CWeg3XHI3acf?= =?us-ascii?Q?aCrGI1tsJKWIKdbMltIxigyVG51OqnO1J9M7c/sdxaAg8mpnE3m77NZXTVSp?= =?us-ascii?Q?Y9V/AVrK5Cl1tErgT0Z1Ywv4wPXYi4cCMjtXfW0X?= X-MS-Exchange-CrossTenant-Network-Message-Id: 2f799347-dcf1-4391-c576-08dc1e1d570d X-MS-Exchange-CrossTenant-AuthSource: DS0PR11MB8665.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 03:17:35.0063 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: f7cd0r453XN5JZaSSNvO+9vCm+3ONl34+LJSwh+4k/mox+HArgiFpxIqPJfh5JuWO39eHvRnbY302yno4cBzxQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6879 X-OriginatorOrg: intel.com On Tue, Jan 23, 2024 at 06:41:54PM -0800, Yang Weijiang wrote: >Save CET SSP to SMRAM on SMI and reload it on RSM. KVM emulates HW arch >behavior when guest enters/leaves SMM mode,i.e., save registers to SMRAM >at the entry of SMM and reload them at the exit to SMM. Per SDM, SSP is >one of such registers on 64-bit Arch, and add the support for SSP. Note, >on 32-bit Arch, SSP is not defined in SMRAM, so fail 32-bit CET guest >launch. > >Suggested-by: Sean Christopherson >Suggested-by: Chao Gao >Signed-off-by: Yang Weijiang >Reviewed-by: Maxim Levitsky >--- > arch/x86/kvm/cpuid.c | 11 +++++++++++ > arch/x86/kvm/smm.c | 8 ++++++++ > arch/x86/kvm/smm.h | 2 +- > 3 files changed, 20 insertions(+), 1 deletion(-) > >diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >index 3ab133530573..95233b0879a3 100644 >--- a/arch/x86/kvm/cpuid.c >+++ b/arch/x86/kvm/cpuid.c >@@ -149,6 +149,17 @@ static int kvm_check_cpuid(struct kvm_vcpu *vcpu, > if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) > return -EINVAL; > } >+ /* >+ * Prevent 32-bit guest launch if shadow stack is exposed as SSP >+ * state is not defined for 32-bit SMRAM. >+ */ >+ best = cpuid_entry2_find(entries, nent, 0x80000001, >+ KVM_CPUID_INDEX_NOT_SIGNIFICANT); >+ if (best && !(best->edx & F(LM))) { >+ best = cpuid_entry2_find(entries, nent, 0x7, 0); >+ if (best && (best->ecx & F(SHSTK))) F(LM) and F(SHSTK) are kernel-defined feature bits; they are not bit masks defined by the CPU. You can use cpuid_entry_has() instead. Shouldn't we do this only if SMM is supported, i.e., when static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE) is true. >+ return -EINVAL; >+ } > > /* > * Exposing dynamic xfeatures to the guest requires additional >diff --git a/arch/x86/kvm/smm.c b/arch/x86/kvm/smm.c >index 45c855389ea7..7aac9c54c353 100644 >--- a/arch/x86/kvm/smm.c >+++ b/arch/x86/kvm/smm.c >@@ -275,6 +275,10 @@ static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, > enter_smm_save_seg_64(vcpu, &smram->gs, VCPU_SREG_GS); > > smram->int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu); >+ >+ if (guest_can_use(vcpu, X86_FEATURE_SHSTK)) >+ KVM_BUG_ON(kvm_msr_read(vcpu, MSR_KVM_SSP, &smram->ssp), >+ vcpu->kvm); > } > #endif > >@@ -564,6 +568,10 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, > static_call(kvm_x86_set_interrupt_shadow)(vcpu, 0); > ctxt->interruptibility = (u8)smstate->int_shadow; > >+ if (guest_can_use(vcpu, X86_FEATURE_SHSTK)) >+ KVM_BUG_ON(kvm_msr_write(vcpu, MSR_KVM_SSP, smstate->ssp), >+ vcpu->kvm); >+ > return X86EMUL_CONTINUE; > } > #endif >diff --git a/arch/x86/kvm/smm.h b/arch/x86/kvm/smm.h >index a1cf2ac5bd78..1e2a3e18207f 100644 >--- a/arch/x86/kvm/smm.h >+++ b/arch/x86/kvm/smm.h >@@ -116,8 +116,8 @@ struct kvm_smram_state_64 { > u32 smbase; > u32 reserved4[5]; > >- /* ssp and svm_* fields below are not implemented by KVM */ > u64 ssp; >+ /* svm_* fields below are not implemented by KVM */ > u64 svm_guest_pat; > u64 svm_host_efer; > u64 svm_host_cr4; >-- >2.39.3 >