Received-SPF: pass (google.com: domain of linux-kernel+bounces-39902-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3;
Message-ID: <8cd0d61c-0008-4ddc-a93c-771c8c2c47e8@intel.com>
Date: Fri, 26 Jan 2024 17:13:49 +0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v9 10/27] KVM: x86: Refine xsave-managed guest
 register/MSR reset handling
To: Chao Gao <chao.gao@intel.com>
CC: <seanjc@google.com>, <pbonzini@redhat.com>, <dave.hansen@intel.com>,
	<kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <x86@kernel.org>,
	<yuan.yao@linux.intel.com>, <peterz@infradead.org>,
	<rick.p.edgecombe@intel.com>, <mlevitsk@redhat.com>, <john.allen@amd.com>
References: <20240124024200.102792-1-weijiang.yang@intel.com>
 <20240124024200.102792-11-weijiang.yang@intel.com>
 <ZbI1NqPLpnSZc6g9@chao-email>
Content-Language: en-US
From: "Yang, Weijiang" <weijiang.yang@intel.com>
In-Reply-To: <ZbI1NqPLpnSZc6g9@chao-email>
Content-Type: text/plain; charset="UTF-8"; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?bkZrZy81OHVtMisramJ6K1BjUDI4K0hMNFdzRlprOFhHL3NoZytDRnBYK0xq?=
 =?utf-8?B?T3RJSGNhS3RvM2FwL093RlNVbEdGZDF5L3BhUjJzNDhIOExWcEhYNXNOU3pq?=
 =?utf-8?B?WEtxMVdzeUpCWVZuMC9PTHJyanljOVVhV3pSRnZzZHh3bFNBSEZiWTBqSm40?=
 =?utf-8?B?MXBlWlRlcjBpUHp3S25UWmNldXZsN3lla2dmMytVWXMvanM2RTdBdVJrUTI3?=
 =?utf-8?B?WWx4RUc4ZFFmYS90YXZPUUU0ekFNTGpaSTdpNHBacGVFcitORFgyWXJaM1I1?=
 =?utf-8?B?Q3JUb3E1aEtHVXFrcHAya0kwMkdFaElLVDhFWldndVVxenVkK29xQlI4ZlNw?=
 =?utf-8?B?WUJvZFE1QmJsb1FmRm5saGwyVzZnNUtvZEpWSjJDOUNEVCs2WjQ1VjhvbGZ3?=
 =?utf-8?B?WE81ZnkzOU5ZOUU1VFFOeGdGZFFnS1Q0WndxTkh2Q3RLNG5VM0xXQ21RaitY?=
 =?utf-8?B?THZBT252MllHdnJqS0tiT0Y4elBJdWZVN2d6bEhUNUx2SlBNa2t5YkFURy9H?=
 =?utf-8?B?UC9XcVFTSEJ4RjllaGZ6THIrNzRQMUtYaUdyNGN5SUhKdXBtNitOdE9Ed0VL?=
 =?utf-8?B?Y0pZUHJwOTVzbGNLR1A0aS9WVldOZ1JKSU5SVng5dThqYWtTRHJPbTJicVNp?=
 =?utf-8?B?QjU2cU9WSnFYSm9la3U5S2lYQ25XL3RiKy9lUVAyNDFBcFp6VDBZcjUzSHpa?=
 =?utf-8?B?cEs1SkQ3NzduaWZ5aXJLa3VrWHYwYmhmMzVmSDRMMEt1RjFMZFBOY0ZGZnh0?=
 =?utf-8?B?U0YyQUprcVJLVXVORGF0N3FWdngwOEoxeEJCUFNKWERqeERLMUsrS3JzNk53?=
 =?utf-8?B?ZzNWaGtBd0dKc2N1SXlnVVBXVnBaY3V5bWZpSmZSZnJGcHU5bC9pN092YjZW?=
 =?utf-8?B?LzdWcy9JSnBTWStvVVozYVpuWW1FRklKdndHblZzOXJiRzRxcU9TYW1KblE0?=
 =?utf-8?B?N2FWWGJFblI4M0JSWE1vdm1oeTByMmxmdGUyWUhMUXhiY0RKWHpOWGUweXBX?=
 =?utf-8?B?OHBYNVlRWVRQWHVCQlJBMzlQUUlxRmxWVzhhbnJqbmdoMGs0MCtvazE0QzZp?=
 =?utf-8?B?RXJueFhZTy9hSVpOR3B0QkpuYzRsa2RHbWpyZm15UHdBekFzKzhobG83c0lW?=
 =?utf-8?B?cGZ5NWVjZlB1QUJIV2hLVzFDTEI4ZzQrd3NHV2dSUXRnSkl1TFdhcS96UGp0?=
 =?utf-8?B?MkNIcDJZdmlBa0o3dVgzai9wT0E3V3FhVXlGRGpOM29xUXJqQzNCYVg4L2N2?=
 =?utf-8?B?TnpWbmpmM1cvR1ZpZFQwUytmb1haek8xYlZ1WkJlZS9BbWlraXhkamUyMDZy?=
 =?utf-8?B?eWlhVUxWRkpwT3llMVh3WmJIN0NuK2pyV3FpT09wdDRpbzRMTWpZYjJrYlh0?=
 =?utf-8?B?TTJUODI0NDJ0SDFMQityenFCYWVKT1VuNFFoNVowdWl1N3Zsc3NGWnVhTm1F?=
 =?utf-8?B?R1htWDBmN2UvcnNWYXU5bTY2NVk5dzFaN0dERElKNWRPV21xZ2pkajUwMXhY?=
 =?utf-8?B?WGZaMVg0bFlqVWl5aXBtNy9GN2k0aFFXVVNYTklzN1FCOWVka2s3YW9XejNt?=
 =?utf-8?B?Wm1PTEFGWGtCNlBuenZKYVZhV1FZclR1L0VUV2pJUStiUkRhbEZRWVAxVzM0?=
 =?utf-8?B?RjNJcmtNZFVRYTB4SkJ4SmNyeXF4R1RzSDFBWWwyN3ROdmQyWXRkaExiOHJa?=
 =?utf-8?B?Q05jVkVNMTBPdE9vaDlkYVJYQ2dtWDZjVkY0Ritvd1ltZHloRzZHTVREa2JL?=
 =?utf-8?B?WUhhSlc3b3lndlV4bGhRdm0wQ1c1Q0U3SUVoNjV0NTFaRmhGYWRjdFhqOVdD?=
 =?utf-8?B?clV1SUs5U3Q4bzRpbXA2cm5QR1dybFNJcXlzcWxPTTVsZzRrRGZqVzJFV2hi?=
 =?utf-8?B?WkFtaFF2UVdmWmNzSUhVRldPbUxWZFU5ZUhVaEUvRG5mZURLVkNrelFieUpE?=
 =?utf-8?B?dG11ZXJOQzA2b0d6TGNLRWllbU1tQzc2Z0dSWDYwbzdsVFkwZnpDZWtPQVJ0?=
 =?utf-8?B?aGtKdkFmYmY3RHduaFdMS0xFaEJvV1M1TUdMMnl6MDMwaXdudDVJajlXNmZo?=
 =?utf-8?B?a3YzZForUnpUYjhMTlU4Uis3cGl4Tlo1bEFZelBudFdXbWhpZG80VjhnV2ZX?=
 =?utf-8?B?Yk5BMzFKaTNlS0VBSmtlS1pIWVZteUFtOUlXeUtSc3lSRWl0NENpTUw0U2RX?=
 =?utf-8?B?RWc9PQ==?=
X-MS-Exchange-CrossTenant-Network-Message-Id: 36773d7e-c57e-452c-1e85-08dc1e4f23af
X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB4965.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 09:14:03.4063
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 91foQQfUlJv7vzmvMwE0JQuqakWNdG7Iaa582weaV78SFq1wCTGYy7lvuXU0Bm/IDAszdBlW1/I+lh9D2fJFUg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR11MB7396
X-OriginatorOrg: intel.com

On 1/25/2024 6:17 PM, Chao Gao wrote:
> On Tue, Jan 23, 2024 at 06:41:43PM -0800, Yang Weijiang wrote:
>> Tweak the code a bit to facilitate resetting more xstate components in
>> the future, e.g., adding CET's xstate-managed MSRs.
>>
>> No functional change intended.
>>
>> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
>> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
>> ---
>> arch/x86/kvm/x86.c | 15 ++++++++++++---
>> 1 file changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>> index 0e7dc3398293..3671f4868d1b 100644
>> --- a/arch/x86/kvm/x86.c
>> +++ b/arch/x86/kvm/x86.c
>> @@ -12205,6 +12205,11 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
>> 		static_branch_dec(&kvm_has_noapic_vcpu);
>> }
>>
>> +static inline bool is_xstate_reset_needed(void)
>> +{
>> +	return kvm_cpu_cap_has(X86_FEATURE_MPX);
>> +}
>> +
>> void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
>> {
>> 	struct kvm_cpuid_entry2 *cpuid_0x1;
>> @@ -12262,7 +12267,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
>> 	kvm_async_pf_hash_reset(vcpu);
>> 	vcpu->arch.apf.halted = false;
>>
>> -	if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
>> +	if (vcpu->arch.guest_fpu.fpstate && is_xstate_reset_needed()) {
>> 		struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
>>
>> 		/*
>> @@ -12272,8 +12277,12 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
>> 		if (init_event)
>> 			kvm_put_guest_fpu(vcpu);
>>
>> -		fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
>> -		fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
>> +		if (kvm_cpu_cap_has(X86_FEATURE_MPX)) {
>> +			fpstate_clear_xstate_component(fpstate,
>> +						       XFEATURE_BNDREGS);
>> +			fpstate_clear_xstate_component(fpstate,
>> +						       XFEATURE_BNDCSR);
>> +		}
> Checking whether KVM supports MPX is indirect and adds complexity.
>
> how about something like:
>
> #define XSTATE_NEED_RESET_MASK		(XFEATURE_MASK_BNDREGS | \
> 					 XFEATURE_MASK_BNDCSR)
>
> 	u64 reset_mask;
> 	...
>
> 	reset_mask = (kvm_caps.supported_xcr0 | kvm_caps.supported_xss) &
> 			XSTATE_NEED_RESET_MASK;
> 	if (vcpu->arch.guest_fpu.fpstate && reset_mask) {
> 	...
> 		for_each_set_bit(i, &reset_mask, XFEATURE_MAX)
> 			fpstate_clear_xstate_component(fpstate, i);
> 	...
> 	}
>
> then in patch 24, you can simply add CET_U/S into XSTATE_NEED_RESET_MASK.

Yes, the proposal looks good to me, will apply it in next version, thanks!