Received-SPF: pass (google.com: domain of linux-kernel+bounces-40437-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3;
From: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
Date: Fri, 26 Jan 2024 18:27:47 +0100
Subject: [PATCH v5 6/6] arm64: dts: rockchip: px30-ringneck-haikou: add
 rs485 support on uart5
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
Message-Id: <20240126-dev-rx-enable-v5-6-5d934eda05ca@theobroma-systems.com>
References: <20240126-dev-rx-enable-v5-0-5d934eda05ca@theobroma-systems.com>
In-Reply-To: <20240126-dev-rx-enable-v5-0-5d934eda05ca@theobroma-systems.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, 
 Jiri Slaby <jirislaby@kernel.org>, Rob Herring <robh+dt@kernel.org>, 
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, 
 Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh@kernel.org>, linux-kernel@vger.kernel.org, 
 linux-serial@vger.kernel.org, devicetree@vger.kernel.org, 
 linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, 
 quentin.schulz@theobroma-systems.com, 
 Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0:
	=?utf-8?B?ZnhUalJSZ3p5NjV3WWF6RFJWaFpsMWJOenByRmtkVXVvNHBFY2FjcWF2ampJ?=
 =?utf-8?B?YWlJcEdHZVBrSy9GdGpwOElpTDJKV0VRbUthbVRtV3dnL0JZLzVjZ1lBeURE?=
 =?utf-8?B?a2lPMnoxZ2ZobHVzcEVidlMwdUc3R2VLZDdSdERHS25vTUZrZjlzcFZGdWpT?=
 =?utf-8?B?b0RMM2lGbFdWUDArbTlrRDRNS2U4dlkydm03TEhVRXdzY3NudGIwOURESGVX?=
 =?utf-8?B?S1hORExMNUNRcThoU3haQUlRL2hwTWhTcGFmWVF1d29xcWQwVkgrelZQN3JU?=
 =?utf-8?B?SzZVRUVobG9MTTdsajAwN2xDSkRCNjJXYlYyOXI5ZXFDSkkzckJOZUNPK1FK?=
 =?utf-8?B?WGhSeC9JdTZkazZtTG4vbTM3ZTlLMTBudUNMNm5RYkRhOTdZektoUXpHZWFw?=
 =?utf-8?B?SmR5QmNibUpmeC9NOUlNdm8zbGlOUWVKeWc1dEZZYVgwa1dqZGl4VGZhSStC?=
 =?utf-8?B?RVJGVTJzRzFDaUtrNHIzNDBWTEc1N1JEeDRaaElDbmdRZFgyKzZZcGJxVmQ2?=
 =?utf-8?B?cm93R1p3ekxIcURSUEZvaWE1VUd5aFExV1dONWRoWjZTOG56MG1ONk55dXkw?=
 =?utf-8?B?QUxTN0huYUFFYm5CcnVzK0I3cVVacFBJTENjRjhzYVRUVERtMHVMMVMvMnEr?=
 =?utf-8?B?ZGlzbVFoNGxNdnN5TGVjQkphems4eWxJRVBoc2oxSzZkSDYzamNCWDNoMzJE?=
 =?utf-8?B?TDM1MTFndHJ3ODRpNlpwWk5rcmcwWjRRa25GcU1zMXR1b2x0M0R0K2NFS21i?=
 =?utf-8?B?MXJkZVFCR2laTXdaMjVISEFsYWNUeWpSTnh2NXF0YTJYNHZSRitRZXphQWJL?=
 =?utf-8?B?MVlsWFB2bkpZc3pxUWkySFJ2UndvRkxGQ0FZSTI3bDFuMXl4WGpOK3RtcjAw?=
 =?utf-8?B?eG1tN2VldHBITVdTYW94YkdaTkFXc0lqR094WUx2ZVRlOGdXdmdFeVpaTjd2?=
 =?utf-8?B?YzN5azZwd2VPaXBITGNwMkRPOTZzZzJHQVNvNkNRMG8vaktreVpHQnozcnFs?=
 =?utf-8?B?akZ2RHluZlA4TnRkY1VwRDJEYUsvdEpHaWhLN1U0d1R4aStzQkdpNFZCRy8r?=
 =?utf-8?B?SG9oTklTdzhXVmtNNFY2UDNzSTZHZ3cwVGF0MkRmZFJZajFyL3pydHQ0aHdm?=
 =?utf-8?B?dlB4RThodDd1bm4vUzUwVjlsL3VycFk0ck1XSzdKRGluSU5ERUEydUF2NGli?=
 =?utf-8?B?QmNuaVRMY0hETXJwM3FhVE1wbXZtUE1iTTZCYUpkclkyZ1JiOVBEVVAxcmox?=
 =?utf-8?B?NHdlR0EvNmFXQjg5WWNocXgwcUo1c2hSMnV2RWVKRWN3Wm9ad3Z6ajBDVXRy?=
 =?utf-8?B?dS8yUU9ZaElPWVFqcDNyeHlFQ01lNUl2eGl2UGo1aFluQVZuckRIeVNVbGdG?=
 =?utf-8?B?OGJaQ0M5SUhuSFRLY0RtL200SWZzQ3RYVEd3TDhuVWx5bEswMURZdDNZVWU0?=
 =?utf-8?B?R3pJdk82bnZBUi9FZHA3dFluUnhsbzgxU0lWOWp4VWk5bWVmTkpySmRqa1lr?=
 =?utf-8?B?dmJjR1BOZWpiNjc0UmVhR2tKQmoxWUpsWmlJQkl0SkEzQnpxbW9MZHBHVmFw?=
 =?utf-8?B?RWpNSTJLeVFuRnF4a2hMTlJDWVFEK2pxSC9UaS9penNQRnM3WFRpVlQ1bzNn?=
 =?utf-8?B?WStUbXMxWG5zTXU4MVFxUmF0ZWRDYTRHaXcxQmZkUk9CK0Q1Zlk1cjB6NGJF?=
 =?utf-8?B?bHhTZWllNWMrcTFDalhaQWVrV0N1TDhvOWg1VmZ6Qi9xbWZ0MHJwR3R0Qy8v?=
 =?utf-8?B?NGtsK2w3THBRZWN2RFQ2QktPRDNaNTZkY0dPMFFIc2pZMWVXNXNNampHZlN1?=
 =?utf-8?B?WWJSV0VHeWk5QnErYVExZklSamJvUy9UNUt5ZFpJbUgreDlwUnFnVXBoUFdP?=
 =?utf-8?B?by9JVy9SUC9wbFJTYks0UFFtTU54bGNzN3pndGVRMlpnM1lPb3h1Q2lzeHR1?=
 =?utf-8?B?UnFXaGRLeDBFVnBkS1E4L2RLUmFnQlRkZC9SVGMxZW9ZN0xvbVBYQlpkVE1O?=
 =?utf-8?B?VVRYVW9odkZxcmNHYmtxNFZrcFZZcTd6K1MwV3EvbTBxaWFaU3d2c0VKU3Vr?=
 =?utf-8?B?M0pZQTZqZ20yUUdvZFJ5MGI2emQxQi9oeVNNMnlIcXdRdGdienFPUEZ2Qm1r?=
 =?utf-8?B?TmEranlWMkwzSkIrcWpsU25DOHlEVkU0MXZFaGpxajNKejkxc1hVTXBVbkgr?=
 =?utf-8?Q?k3HvNP+obD6Sl0fYSttUD30=3D?=
X-OriginatorOrg: theobroma-systems.com
X-MS-Exchange-CrossTenant-Network-Message-Id: d10bcd99-afe3-4ea2-52b6-08dc1e943a9b
X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB6382.eurprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 17:28:36.7887
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 5e0e1b52-21b5-4e7b-83bb-514ec460677e
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: uM0XNXV4kW2jJyzuqY0Wo5PbZbEWS7COw9VbfGS+OSfsRy+zwLdhH7rl9WB7rfYN5yeD7IV/3zbdd4newnrixiExlu87DX/X/3FJs4dv6004xpuA4VN1mDI4rnoioQys
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB9820

A hardware switch can set the rs485 transceiver into half or full duplex
mode.

Switching to the half-duplex mode requires the user to enable em485 on
uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the
RTS signal for uart5. Which means GPIO0_B5 is implemented as rs485
rx-enable gpio.

In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and
RE is grounded (active). This requires rx-enable gpio to be inactive to
enable DE as well.

Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
index 16798eb77077..369a6518a487 100644
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
@@ -227,6 +227,8 @@ &uart0 {
 
 &uart5 {
 	pinctrl-0 = <&uart5_xfer>;
+	rs485-rx-enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
+	rs485-rx-enable-inactive-when-rs485-disabled;
 	status = "okay";
 };
 

-- 
2.34.1