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Message-ID: <2286ff68-ae30-47d4-9362-16bc780bfe03@ti.com>
Date: Sun, 28 Jan 2024 10:30:27 +0530
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Subject: Re: [PATCH] dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX
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To: Vaishnav Achath <vaishnav.a@ti.com>, <vkoul@kernel.org>,
        <peter.ujfalusi@gmail.com>
CC: <dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <j-choudhary@ti.com>
References: <20240125111449.855876-1-vaishnav.a@ti.com>
From: "Kumar, Udit" <u-kumar1@ti.com>
In-Reply-To: <20240125111449.855876-1-vaishnav.a@ti.com>
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Thanks Vaishnav

On 1/25/2024 4:44 PM, Vaishnav Achath wrote:
> The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
> have up to 32 threads per instance. J721S2 has two instances of the
> subsystem, so there are 64 threads total, Add them to the endpoint map.
>
> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
> ---
> Tested on J721S2 EVM on 6.8.0-rc1-next-20240124 for CSI2RX capture with
> OV5640: https://gist.github.com/vaishnavachath/e6918ae4dadeb34c4cbad515bffcc558
>
>   drivers/dma/ti/k3-psil-j721s2.c | 73 +++++++++++++++++++++++++++++++++
>   1 file changed, 73 insertions(+)
>
> diff --git a/drivers/dma/ti/k3-psil-j721s2.c b/drivers/dma/ti/k3-psil-j721s2.c
> index 1d5430fc5724..ba08bdcdcd2b 100644
> --- a/drivers/dma/ti/k3-psil-j721s2.c
> +++ b/drivers/dma/ti/k3-psil-j721s2.c
> @@ -57,6 +57,14 @@
>   		},					\
>   	}
>   
> +#define PSIL_CSI2RX(x)					\
> +	{						\
> +		.thread_id = x,				\
> +		.ep_config = {				\
> +			.ep_type = PSIL_EP_NATIVE,	\
> +		},					\
> +	}
> +
>   /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
>   static struct psil_ep j721s2_src_ep_map[] = {
>   	/* PDMA_MCASP - McASP0-4 */
> @@ -114,6 +122,71 @@ static struct psil_ep j721s2_src_ep_map[] = {
>   	PSIL_PDMA_XY_PKT(0x4707),
>   	PSIL_PDMA_XY_PKT(0x4708),
>   	PSIL_PDMA_XY_PKT(0x4709),
> +	/* CSI2RX */
> +	PSIL_CSI2RX(0x4940),
> +	PSIL_CSI2RX(0x4941),
> +	PSIL_CSI2RX(0x4942),
> +	PSIL_CSI2RX(0x4943),
> +	PSIL_CSI2RX(0x4944),
> +	PSIL_CSI2RX(0x4945),
> +	PSIL_CSI2RX(0x4946),
> +	PSIL_CSI2RX(0x4947),
> +	PSIL_CSI2RX(0x4948),
> +	PSIL_CSI2RX(0x4949),

Reviewed-by: Udit Kumar <u-kumar1@ti.com>


> +	PSIL_CSI2RX(0x494a),
> +	PSIL_CSI2RX(0x494b),
> [..]