Received: by 2002:a05:7412:d1aa:b0:fc:a2b0:25d7 with SMTP id ba42csp212525rdb; Sun, 28 Jan 2024 22:35:15 -0800 (PST) X-Google-Smtp-Source: AGHT+IFuN3zwfkzpKQ6lyQ9OAFftqUkG9k4NO5l9A9bkaufhyCxvDuJopxBXt7sas6KnJjjG+kmW X-Received: by 2002:a17:906:22d5:b0:a35:e5bf:9a44 with SMTP id q21-20020a17090622d500b00a35e5bf9a44mr171931eja.67.1706510115117; Sun, 28 Jan 2024 22:35:15 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706510115; cv=pass; d=google.com; s=arc-20160816; b=pq1Pb90NabHtmKV+qh3thTHQueWTHjn0wnqlD7HFY1oXPSUKcQ8Oa5szdvKB3iZfM8 5DNVHecs9vNIM6kER7SUYnS4o63gBHgLNc1DwOhVG+i/oKM1oaj7dd0c3UcuM1GNxfA9 e7T0LjsqiaWtoWsTXuomRXAf/wYP50wIShiMkC7uz2eJJ02kA8WhpgV3ZGmQIZqzkt+Z j7NC7ox54smL+rofT/RZ3iclU8G4YaBjwmyPTSmqw2FQhavqhigSNJcO36gi7si2TTez 7HTQr/l78d+J/3n92eAW+mmFe0uhIdcLHBd2G3K+Tee+MN01C2UVo3QtYnv/pX8V7cDj oM5A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=oUOfVeRKnJ1zcg5WgLZGiIN5J1sZ37QJ5q0Qif+5X/Q=; fh=Jm1zUP85NkLhaS8mFbLRiIHu8uZd7NKlphUk8mYvM1c=; b=s2jLfkADwCXFR+d68J7fhzqKpuZ31qz4rGEIYgkJHsqHI4b0x+JDtNVvJ04BRjDf3r YGVbfoqxjUjE6KAcjU7vibHepCT15Md7mKMtCf9BnWgqM08IRg+Vw+tCyBDTqAdiUvjp 6EdFi/mEeqRdC3zjyhEAhjdLHlZ4FSd5GtVpC8/uFr1nVBNX0BUctKxvU+2ALBPSByaA skR42wNSIKCL5OY7AqG8nBMRwVM5TuP95F1q+GZtVe6Toh4C19V4P/Vc90hiQPOX0kPE /kBw9vtrpvBC9nsZ5CO6OgzXCVVfw/4FD8p1RZB/W8ELZL5VkORF5FJ1Kma0gzrbEkkt n3fw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=cF8FVmcf; arc=pass (i=1 spf=pass spfdomain=mediatek.com dkim=pass dkdomain=mediatek.com dmarc=pass fromdomain=mediatek.com); spf=pass (google.com: domain of linux-kernel+bounces-42253-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-42253-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id j12-20020a170906254c00b00a34af68c3a3si3200390ejb.275.2024.01.28.22.35.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Jan 2024 22:35:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-42253-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=cF8FVmcf; arc=pass (i=1 spf=pass spfdomain=mediatek.com dkim=pass dkdomain=mediatek.com dmarc=pass fromdomain=mediatek.com); spf=pass (google.com: domain of linux-kernel+bounces-42253-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-42253-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 9AF821F233DF for ; Mon, 29 Jan 2024 06:35:14 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D309256B7B; Mon, 29 Jan 2024 06:31:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="cF8FVmcf" Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C3A755E6B; Mon, 29 Jan 2024 06:31:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706509868; cv=none; b=Pn66L8IkuiRkZQNZkrUUT1LM45qLOWedmWjfsebnj1GQoXE1mNG5aVNZXgkUEer4a3LS989ruPZhQSk8GWOguZykzjI0sKRITtZWtBcBXVpqBWbX+Lrv9DVWs6gJt2M6Ny1t9Y27/Ln19CIoD6AJeXpQVQ5Yj8drHvw2FijVexI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706509868; c=relaxed/simple; bh=duZ1EMWWCjNLSJH5EAw7vR/rJE0u6uqMpJJitWa/xBg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Vwtojj5Cr2fj3SLJDc/nsGFXdlTx2r1dJaV8HTcHG58hjdJwar09PSx4NsrDcs/pcqR9Nn5xtWufy77ESWzkeeX0eKh72IVY3tN5wxND3TvQThfWUm4pQQSXV5zrGNPTU3Uc3mUay6EPQ9j4W5WciCwNTluqXv6UvoTYPhjtMXg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=cF8FVmcf; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com X-UUID: f955a1aabe6f11ee9e680517dc993faa-20240129 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=oUOfVeRKnJ1zcg5WgLZGiIN5J1sZ37QJ5q0Qif+5X/Q=; b=cF8FVmcfDWfPnEAcbu2EoVsm/qnj32RM2gkMkI4hVV2uDy1IduRhpul4/voEAl/zjJrXR/zben79OPKwMqaZEAupVemvfpFjJSTuCDBroZ8AFwZfuVl4TjUcIB4GV7KEN44Z02B99Gm4eh3DiC1yfDMkDXGwXGHyY3RctymRU3Q=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.36,REQID:52e90b94-7fba-474d-b1ee-99576c99795b,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6e16cf4,CLOUDID:2ad141fe-c16b-4159-a099-3b9d0558e447,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: f955a1aabe6f11ee9e680517dc993faa-20240129 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 800635704; Mon, 29 Jan 2024 14:31:02 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Mon, 29 Jan 2024 14:31:01 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Mon, 29 Jan 2024 14:31:00 +0800 From: Yunfei Dong To: Jeffrey Kardatzke , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert CC: Chen-Yu Tsai , Yong Wu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , Sumit Semwal , Brian Starkey , John Stultz , "T . J . Mercier" , =?UTF-8?q?Christian=20K=C3=B6nig?= , Matthias Brugger , , , , , , , Subject: [PATCH v4,19/22] media: mediatek: vcodec: disable wait interrupt for svp mode Date: Mon, 29 Jan 2024 14:30:22 +0800 Message-ID: <20240129063025.29251-20-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240129063025.29251-1-yunfei.dong@mediatek.com> References: <20240129063025.29251-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N Waiting interrupt in optee-os for svp mode, need to disable it in kernel in case of interrupt is cleaned. Signed-off-by: Yunfei Dong --- .../vcodec/decoder/mtk_vcodec_dec_hw.c | 34 +++++------ .../vcodec/decoder/mtk_vcodec_dec_pm.c | 6 +- .../decoder/vdec/vdec_h264_req_multi_if.c | 57 +++++++++++-------- 3 files changed, 54 insertions(+), 43 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c index 881d5de41e05..1982c088c6da 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c @@ -72,26 +72,28 @@ static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv) ctx = mtk_vcodec_get_curr_ctx(dev->main_dev, dev->hw_idx); - /* check if HW active or not */ - cg_status = readl(dev->reg_base[VDEC_HW_SYS] + VDEC_HW_ACTIVE_ADDR); - if (cg_status & VDEC_HW_ACTIVE_MASK) { - mtk_v4l2_vdec_err(ctx, "vdec active is not 0x0 (0x%08x)", cg_status); - return IRQ_HANDLED; - } + if (!ctx->is_secure_playback) { + /* check if HW active or not */ + cg_status = readl(dev->reg_base[VDEC_HW_SYS] + VDEC_HW_ACTIVE_ADDR); + if (cg_status & VDEC_HW_ACTIVE_MASK) { + mtk_v4l2_vdec_err(ctx, "vdec active is not 0x0 (0x%08x)", cg_status); + return IRQ_HANDLED; + } - dec_done_status = readl(vdec_misc_addr); - if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) != - MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) - return IRQ_HANDLED; + dec_done_status = readl(vdec_misc_addr); + if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) != + MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) + return IRQ_HANDLED; - /* clear interrupt */ - writel(dec_done_status | VDEC_IRQ_CFG, vdec_misc_addr); - writel(dec_done_status & ~VDEC_IRQ_CLR, vdec_misc_addr); + /* clear interrupt */ + writel(dec_done_status | VDEC_IRQ_CFG, vdec_misc_addr); + writel(dec_done_status & ~VDEC_IRQ_CLR, vdec_misc_addr); - wake_up_dec_ctx(ctx, MTK_INST_IRQ_RECEIVED, dev->hw_idx); + wake_up_dec_ctx(ctx, MTK_INST_IRQ_RECEIVED, dev->hw_idx); - mtk_v4l2_vdec_dbg(3, ctx, "wake up ctx %d, dec_done_status=%x", - ctx->id, dec_done_status); + mtk_v4l2_vdec_dbg(3, ctx, "wake up ctx %d, dec_done_status=%x", + ctx->id, dec_done_status); + } return IRQ_HANDLED; } diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_pm.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_pm.c index aefd3e9e3061..a94eda936f16 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_pm.c @@ -238,7 +238,8 @@ void mtk_vcodec_dec_enable_hardware(struct mtk_vcodec_dec_ctx *ctx, int hw_idx) mtk_vcodec_dec_child_dev_on(ctx->dev, MTK_VDEC_LAT0); mtk_vcodec_dec_child_dev_on(ctx->dev, hw_idx); - mtk_vcodec_dec_enable_irq(ctx->dev, hw_idx); + if (!ctx->is_secure_playback) + mtk_vcodec_dec_enable_irq(ctx->dev, hw_idx); if (IS_VDEC_INNER_RACING(ctx->dev->dec_capability)) mtk_vcodec_load_racing_info(ctx); @@ -250,7 +251,8 @@ void mtk_vcodec_dec_disable_hardware(struct mtk_vcodec_dec_ctx *ctx, int hw_idx) if (IS_VDEC_INNER_RACING(ctx->dev->dec_capability)) mtk_vcodec_record_racing_info(ctx); - mtk_vcodec_dec_disable_irq(ctx->dev, hw_idx); + if (!ctx->is_secure_playback) + mtk_vcodec_dec_disable_irq(ctx->dev, hw_idx); mtk_vcodec_dec_child_dev_off(ctx->dev, hw_idx); if (IS_VDEC_LAT_ARCH(ctx->dev->vdec_pdata->hw_arch) && diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c index 2dfb3043493e..3e2270399b6c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c @@ -593,14 +593,16 @@ static int vdec_h264_slice_core_decode(struct vdec_lat_buf *lat_buf) goto vdec_dec_end; } - /* wait decoder done interrupt */ - timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, - WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); - if (timeout) - mtk_vdec_err(ctx, "core decode timeout: pic_%d", ctx->decoded_frame_cnt); - inst->vsi_core->dec.timeout = !!timeout; - - vpu_dec_core_end(vpu); + if (!ctx->is_secure_playback) { + /* wait decoder done interrupt */ + timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, + WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); + if (timeout) + mtk_vdec_err(ctx, "core decode timeout: pic_%d", ctx->decoded_frame_cnt); + inst->vsi_core->dec.timeout = !!timeout; + + vpu_dec_core_end(vpu); + } mtk_vdec_debug(ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x", ctx->decoded_frame_cnt, inst->vsi_core->dec.crc[0], inst->vsi_core->dec.crc[1], @@ -724,14 +726,16 @@ static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf); } - /* wait decoder done interrupt */ - timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, - WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0); - if (timeout) - mtk_vdec_err(inst->ctx, "lat decode timeout: pic_%d", inst->slice_dec_num); - inst->vsi->dec.timeout = !!timeout; + if (!inst->ctx->is_secure_playback) { + /* wait decoder done interrupt */ + timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, + WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0); + if (timeout) + mtk_vdec_err(inst->ctx, "lat decode timeout: pic_%d", inst->slice_dec_num); + inst->vsi->dec.timeout = !!timeout; - err = vpu_dec_end(vpu); + err = vpu_dec_end(vpu); + } if (err == SLICE_HEADER_FULL || err == TRANS_BUFFER_FULL) { if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); @@ -831,16 +835,19 @@ static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs if (err) goto err_free_fb_out; - /* wait decoder done interrupt */ - err = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, - WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); - if (err) - mtk_vdec_err(inst->ctx, "decode timeout: pic_%d", inst->ctx->decoded_frame_cnt); - - inst->vsi->dec.timeout = !!err; - err = vpu_dec_end(vpu); - if (err) - goto err_free_fb_out; + if (!inst->ctx->is_secure_playback) { + /* wait decoder done interrupt */ + err = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, + WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); + if (err) + mtk_vdec_err(inst->ctx, "decode timeout: pic_%d", + inst->ctx->decoded_frame_cnt); + + inst->vsi->dec.timeout = !!err; + err = vpu_dec_end(vpu); + if (err) + goto err_free_fb_out; + } memcpy(&inst->vsi_ctx, inst->vpu.vsi, sizeof(inst->vsi_ctx)); mtk_vdec_debug(inst->ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x", -- 2.18.0