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Sun, 28 Jan 2024 23:52:41 -0800 (PST) Received: from [127.0.1.1] ([117.193.214.109]) by smtp.gmail.com with ESMTPSA id t19-20020a62d153000000b006dddd685bbesm5467329pfl.122.2024.01.28.23.52.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Jan 2024 23:52:41 -0800 (PST) From: Manivannan Sadhasivam Date: Mon, 29 Jan 2024 13:22:06 +0530 Subject: [PATCH 3/3] arm64: dts: qcom: msm8996: Add missing UFS host controller reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240129-ufs-core-reset-fix-v1-3-7ac628aa735f@linaro.org> References: <20240129-ufs-core-reset-fix-v1-0-7ac628aa735f@linaro.org> In-Reply-To: <20240129-ufs-core-reset-fix-v1-0-7ac628aa735f@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Andy Gross , "James E.J. Bottomley" , "Martin K. Petersen" Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=871; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=RDS3ZoaA8gicslZTrtrM9BW7KEYbWoKjgQpkJyCx8uY=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBlt1kv3559B3ZmFp95EfvcA/qs983RKuPwQsFLJ LOoamFISWeJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZbdZLwAKCRBVnxHm/pHO 9RiWB/9WYqXIx/kGqIVlP6rmJnnmWoZjyVR89BVi3fUMSh1HRZwHrR2Qbe0sfSxB4Kr5zeeQcrD 3XfbKs+eu2nqNfxqSlUXVurUkB/bFQCGu4oQHvhiWxCYTA4/s3R7XM/7HmfClsFlY1UaYFUujXa AGEHJrzYPPK+XWMEuM4aQ2WEOYUikKu1BzU7755v2OPYwKeDcIH7WlHdDg6+/N4VNUZmjPq375P eFKciTWzxm3x2bSxck9/uOJ8dm3p0BmjFkgrZ4Cmg3J2tiV2zlZBfgXrI1BgPaKG9/wud2jkPUN gH73zWmaXnDESGrKZZOaYYP4+0kApTt1ReGO+UV60bG1TzO4 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 UFS host controller reset is required for the drivers to properly reset the controller. Hence, add it. Fixes: 57fc67ef0d35 ("arm64: dts: qcom: msm8996: Add ufs related nodes") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 8d41ed261adf..a6592b3e2db7 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2114,6 +2114,8 @@ ufshc: ufshc@624000 { <&bimc MASTER_AMPSS_M0 &cnoc SLAVE_UFS_CFG>; interconnect-names = "ufs-ddr", "cpu-ufs"; + resets = <&gcc GCC_UFS_BCR>; + reset-names = "rst"; lanes-per-direction = <1>; #reset-cells = <1>; status = "disabled"; -- 2.25.1