Received-SPF: pass (google.com: domain of linux-kernel+bounces-42318-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3;
From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
To: linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Cc: paul.walmsley@sifive.com,
	palmer@dabbelt.com,
	aou@eecs.berkeley.edu,
	sudeep.holla@arm.com,
	jeeheng.sia@starfivetech.com,
	robh@kernel.org,
	conor.dooley@microchip.com,
	suagrfillet@gmail.com
Subject: [RFC v1 2/2] riscv: cacheinfo: Refactor populate_cache_leaves()
Date: Sun, 28 Jan 2024 23:59:57 -0800
Message-Id: <20240129075957.116033-3-jeeheng.sia@starfivetech.com>
In-Reply-To: <20240129075957.116033-1-jeeheng.sia@starfivetech.com>
References: <20240129075957.116033-1-jeeheng.sia@starfivetech.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0:
	=?us-ascii?Q?XULIfIufYVg/Vfq2/Kyiv/LkHLtvSQKR1y2RdYVjoZxPVybkLmd2fqQZjjN9?=
 =?us-ascii?Q?RknHy7AmQtzq9uotTz+hbtfbvPq6+4DLPUaJJ/iCy+9EuYtYgk1t8pFGrwXQ?=
 =?us-ascii?Q?SWdcZX6dKSPxzjvTee9WnGoziX/BDpcAk4akukE3gdFjIjBekD9x7AtlJ9Kj?=
 =?us-ascii?Q?w6D4f9BhObBU+Mxcz2AG3fB9PDkdpYzs0CAW9qg0GR+KdTV1s9Lw15WvSVFA?=
 =?us-ascii?Q?q/k8mVsO0ApRHSXHpskw6eMjHNC/umy+nx1Tk5UKXWWvHHsDLiBc6qMAfsqY?=
 =?us-ascii?Q?RUG6nyzSGPn4H/Nxt+7Gv5n9rvtwzYnIsOw38L5TWKrimNVSTY1lHixpAIt2?=
 =?us-ascii?Q?oyLhFk3Unb2nkQIZWSraFBlxKWbUkNYQZA1JxejK9SAjB8pYaPqD+nyjVsW8?=
 =?us-ascii?Q?JvI/ZMeZQ7fnWPQ6ZD1JUrRekTAtmI7VezM0sQ87PELASxqUR0X9iLSIyKJp?=
 =?us-ascii?Q?mJ8ODIXU2dw+VN11Lg/eXzW2Zi4fO/IN+h1VrKMwKpEWTCCyEXya56wACN4J?=
 =?us-ascii?Q?w42GvgdHofdiWM1793vPFnGNMfITukwiZm/ZsVJ1RRTkFAUH7lq6Jkxgp4Ce?=
 =?us-ascii?Q?Ca6+QLSdL709qH379EQkfbxoDXttUMRSDaSG0Ej7Pe/d/BkmZVC0uufYbi1Y?=
 =?us-ascii?Q?mZw3DdSdiGlRMU2J5C6pxXn72USZGxiLOlITatShI2kPmZDfg7jcHiQ0aeMS?=
 =?us-ascii?Q?NL9YPJQnp7bCBrAzkf49Nh3VlnnUHtMo2LqnbBQYeZzKK4laiZmp/L9VGqO+?=
 =?us-ascii?Q?LWLntIFIQpKVHF8fQEZ3j26OySKFbQAMSGSCr8Tq0Z0Yw+52DQteEUaYMPt9?=
 =?us-ascii?Q?EXpdn4vfL4Ds7OVtiCvZMwLGjsZIUftKX0RhozlgAR9MGqcg9q48vyOOxMNr?=
 =?us-ascii?Q?9570/M/4sreyx5/2KGB2SBKSudtQXOb5qlachXoHOnINmrirBunFDvuN72/i?=
 =?us-ascii?Q?yCHJCtVhnjLjIO5MijEVXwgoHRh9q1jEXtcznElS6V9d4OLaAnLavegjD/KC?=
 =?us-ascii?Q?Zv9R+yjzsxuUfAgX9oPyNMu0Zv1oQljMKTm6XAZctsrywzAW23/Bm6mlKUbB?=
 =?us-ascii?Q?4IKUNAhlVyH7V+Gsclo2v0ChaDb6E7pfmf171Lp58UvPTH8fdKG9b1o3XfJ8?=
 =?us-ascii?Q?pd5nhP3/z4yI4Z7guzXw6klrMBXE3vmaDLvj2H6GkgRHUJgMRNLogxph+ari?=
 =?us-ascii?Q?fAFRANaBJe2y6iIqaEh2QsbnzSWbsHHjNpo9xWSpt7gVDsnhcyzDDQgAvd54?=
 =?us-ascii?Q?64fxweJZqggWgjt9gtE5M3ZJ2UFSbuFKZTE/cgdPNLhKFUNuhsXGYvZAbDUb?=
 =?us-ascii?Q?huBCGeKfkH1XGfJTewLiYnxTSJABEmUFwL8DVAvPTaEYQl5iyjii70/7EqS5?=
 =?us-ascii?Q?rDTMZjOZuEWaqWcg+hMb2XCS1saRvS0wDfy/o/hTQ40M/8ko8agLmQ7FDCZJ?=
 =?us-ascii?Q?Ybq4NMzE5/VEYDQJJHipzsBYUH1u3KV6hSLyjUXxZHKlw6k8S0bB8nIDk7EP?=
 =?us-ascii?Q?qhPiIy7HgogAcocZnXefYfZTNGNIX8UeRiGn1VFojyWPhFQ2EyQSpf07YBgE?=
 =?us-ascii?Q?gFs1aM3Ngg3mEQKEGFBcq34JnlQQNBuvfI89BJLIzez6u5k7mI63b8D3ntym?=
 =?us-ascii?Q?YQ=3D=3D?=
X-OriginatorOrg: starfivetech.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 39db1208-901c-4394-73ac-08dc20a056af
X-MS-Exchange-CrossTenant-AuthSource: BJSPR01MB0561.CHNPR01.prod.partner.outlook.cn
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jan 2024 08:00:20.4008
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 06fe3fa3-1221-43d3-861b-5a4ee687a85c
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: MBeGMM+s+mkZnU+3A6aVRXydgcO+jJnxc+cIoBOkFBrTUMt+HLb4RRvhce9g3nFycWfyul6IELK63z2SHUdyWJlu2Vz6/u8nSO+TCp3iF+c=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BJSPR01MB0545

Refactoring the cache population function to support both DT and
ACPI-based platforms.

Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
---
 arch/riscv/kernel/cacheinfo.c | 47 ++++++++++++++---------------------
 1 file changed, 19 insertions(+), 28 deletions(-)

diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
index 30a6878287ad..f10e26fb75b6 100644
--- a/arch/riscv/kernel/cacheinfo.c
+++ b/arch/riscv/kernel/cacheinfo.c
@@ -74,36 +74,27 @@ int populate_cache_leaves(unsigned int cpu)
 {
 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
 	struct cacheinfo *this_leaf = this_cpu_ci->info_list;
-	struct device_node *np = of_cpu_device_node_get(cpu);
-	struct device_node *prev = NULL;
-	int levels = 1, level = 1;
-
-	if (of_property_read_bool(np, "cache-size"))
-		ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);
-	if (of_property_read_bool(np, "i-cache-size"))
-		ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
-	if (of_property_read_bool(np, "d-cache-size"))
-		ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
-
-	prev = np;
-	while ((np = of_find_next_cache_node(np))) {
-		of_node_put(prev);
-		prev = np;
-		if (!of_device_is_compatible(np, "cache"))
-			break;
-		if (of_property_read_u32(np, "cache-level", &level))
-			break;
-		if (level <= levels)
-			break;
-		if (of_property_read_bool(np, "cache-size"))
-			ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);
-		if (of_property_read_bool(np, "i-cache-size"))
-			ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
-		if (of_property_read_bool(np, "d-cache-size"))
+	unsigned int level, idx;
+
+	for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
+	     idx < this_cpu_ci->num_leaves; idx++, level++) {
+		/*
+		 * Since the RISC-V architecture doesn't provide any register for detecting the
+		 * Cache Level and Cache type, this assumes that:
+		 * - There cannot be any split caches (data/instruction) above a unified cache.
+		 * - Data/instruction caches come in pairs.
+		 * - Significant work is required elsewhere to fully support data/instruction-only
+		 *   type caches.
+		 * - The above assumptions are based on conventional system design and known
+		 *   examples.
+		 */
+		if (level == 1) {
 			ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
-		levels = level;
+			ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
+		} else {
+			ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);
+		}
 	}
-	of_node_put(np);
 
 	return 0;
 }
-- 
2.34.1