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Mon, 29 Jan 2024 09:18:34 +0000 Received: from DS0PR11MB7529.namprd11.prod.outlook.com ([fe80::b877:93ff:2217:eb13]) by DS0PR11MB7529.namprd11.prod.outlook.com ([fe80::b877:93ff:2217:eb13%7]) with mapi id 15.20.7228.029; Mon, 29 Jan 2024 09:18:34 +0000 Message-ID: <7adec292-9d38-41ab-a982-bd840b24f3ab@intel.com> Date: Mon, 29 Jan 2024 17:21:40 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 5/5] iommu/vt-d: improve ITE fault handling if target device isn't present Content-Language: en-US To: "Tian, Kevin" , Ethan Zhao , "baolu.lu@linux.intel.com" , "bhelgaas@google.com" , "robin.murphy@arm.com" , "jgg@ziepe.ca" CC: "dwmw2@infradead.org" , "will@kernel.org" , "lukas@wunner.de" , "iommu@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" References: <20240129034924.817005-1-haifeng.zhao@linux.intel.com> <20240129034924.817005-6-haifeng.zhao@linux.intel.com> From: Yi Liu In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SG3P274CA0008.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:be::20) To DS0PR11MB7529.namprd11.prod.outlook.com (2603:10b6:8:141::20) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7529:EE_|SA0PR11MB4639:EE_ X-MS-Office365-Filtering-Correlation-Id: 99626e04-6cdc-43c6-a436-08dc20ab44cd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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>> int head, tail; >> + u64 iqe_err, ite_sid; >> struct q_inval *qi = iommu->qi; >> int shift = qi_shift(iommu); >> >> @@ -1316,6 +1317,13 @@ static int qi_check_fault(struct intel_iommu >> *iommu, int index, int wait_index, >> tail = readl(iommu->reg + DMAR_IQT_REG); >> tail = ((tail >> shift) - 1 + QI_LENGTH) % QI_LENGTH; >> >> + /* >> + * SID field is valid only when the ITE field is Set in FSTS_REG >> + * see Intel VT-d spec r4.1, section 11.4.9.9 >> + */ >> + iqe_err = dmar_readq(iommu->reg + DMAR_IQER_REG); >> + ite_sid = DMAR_IQER_REG_ITESID(iqe_err); >> + >> writel(DMA_FSTS_ITE, iommu->reg + DMAR_FSTS_REG); >> pr_info("Invalidation Time-out Error (ITE) cleared\n"); >> >> @@ -1325,6 +1333,16 @@ static int qi_check_fault(struct intel_iommu >> *iommu, int index, int wait_index, >> head = (head - 2 + QI_LENGTH) % QI_LENGTH; >> } while (head != tail); >> >> + /* >> + * If got ITE, we need to check if the sid of ITE is the same as >> + * current ATS invalidation target device, if yes, don't try this >> + * request anymore if the target device isn't present. >> + * 0 value of ite_sid means old VT-d device, no ite_sid value. >> + */ >> + if (pdev && ite_sid && !pci_device_is_present(pdev) && >> + ite_sid == pci_dev_id(pci_physfn(pdev))) >> + return -ETIMEDOUT; >> + > > since the hardware already reports source id leading to timeout, can't we > just find the pci_dev according to reported ite_sid? this is a slow path (either > due to device in bad state or removed) hence it's not necessary to add more > intelligence to pass the pci_dev in, leading to only a partial fix can be backported. > > It's also more future-proof, say if one day the driver allows batching invalidation > requests for multiple devices then no need to pass in a list of devices. > > Then it's easier to backport a full fix. May consider pci_get_domain_bus_and_slot() or pci_find_bus()/pci_get_slot(). But I doubt if the pci_dev is still tracked in the bus or a kind of dev list in the device hot removal case. So Ethan may need to check. Regards, Yi Liu -- Regards, Yi Liu