Received: by 2002:a05:7412:d1aa:b0:fc:a2b0:25d7 with SMTP id ba42csp343912rdb; Mon, 29 Jan 2024 04:15:06 -0800 (PST) X-Google-Smtp-Source: AGHT+IGuupNThpJS/eXMct7SRX1QeRUGZKHVb//1aoItnJDs3RwR81kvmGzcarvHGdYslXm3Qojk X-Received: by 2002:a17:90a:5d07:b0:28f:fc51:ad43 with SMTP id s7-20020a17090a5d0700b0028ffc51ad43mr3043474pji.49.1706530505853; Mon, 29 Jan 2024 04:15:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706530505; cv=pass; d=google.com; s=arc-20160816; b=jxLXrbHDIugpVRju7tDIWknmphxiTuZEbpyuZ1PZ2psfLogGCttDSkEHknm/1dRS6n 0yp9JqZxUnPLCTABjpEB0MQ7Ib9+smHTUHjdHlg2ZYKJ6Z6VMEilOn24F3bKPe9tQnk7 VuRzE2tOTByrnaog/GDoVIR0SNkl9GmZnqFrGWe3+h04lUzn3Qd6LSBsOz1Jy6DVcSgE OHe4oc2kqTMcBJaRKpzkz3cbI5DIGK/Wctc/sY1NGCnwMhzF/PiahK8exlIjj2dCmKky Sl3wnSSpZr0j65XnvCB/2Og+xNM1PJm8dv5Qd8/b3pyz+vueOz4FXSa9kfq6pyMWiBvV yeLw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:in-reply-to:from:references:cc:to:subject :user-agent:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:date:message-id:dkim-signature; bh=KrTTeXit/hICT77ZnI9jdileJj0geMUPaFU4OJqZfyw=; fh=8scsGQn+hJ1HvbMI23kGOdGh/wtWpH4wdCi8Q1zCFc4=; b=Het1SgT8SYjyhLVRAl3zcdbTmgAqyi9eoojmujKRmnfoFsSXHPnGFmUSIdvBqKAiY/ ZV4Pd2AghB34HiQaI6l687J21giyuRXldnX5Pi8YfRMBIvWEJq51pbb/YOwq4Na4mBGP xY5uNgDusQPgThp31O+Rkvqvnyx1yHJWTBhi4JP0Lgoid1rFc0X6rGPRgt1X4YhOYB6R Biga7SyYWGqKNvHSQUOqjP+/Gnd4xwxag96eaz8cUpGqAM0db+c5vr0ynfNcjcKKqAlj Mm367V5d4KRfNchWdMIpst3rLIvnNZ765O3/vU7so+/5oIldZ7hvqGBjg2wNMFfWQj7B fJZA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OmFk+bD2; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-42156-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-42156-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [2604:1380:40f1:3f00::1]) by mx.google.com with ESMTPS id p12-20020a17090adf8c00b00290cd0b42fasi7649639pjv.146.2024.01.29.04.15.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 04:15:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-42156-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OmFk+bD2; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-42156-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-42156-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 1F003B221DD for ; Mon, 29 Jan 2024 04:29:40 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 12BCC1AAA5; Mon, 29 Jan 2024 04:29:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OmFk+bD2" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D94B14AAA; Mon, 29 Jan 2024 04:29:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706502567; cv=none; b=mKR/TfEIR/NSVy4BCSx/Txf6GhTuPu/GFTaE9Rhg9P7iVHwp5OA9DEXSPMyITpOCdgSdOypESIaBtuqZ/KoiNPkbLW8abeiVVoutbDo2AB6amKN3+/uIZgYbLP4CyIrkhuRCM1b8BEtfhDnMnBCcU9QyB1eGhOCG0OA0sFf0IFU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706502567; c=relaxed/simple; bh=3EK/8yxeed8m7k4dlgjD0V/NjwPLMBHE+69C12MTZ18=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Hw3SBe0QSKWkCtxY2ypV7dAfEYmdji0P9mMLVnsYw0UMhUDCfLgHgOBUKc8BguOADY8i02Ds822LAfed80DdQauPnSWoxjoh0u42uEjTwJ4dvC2rBES07HuZQO5Wk00/08R8HGbQ8TEKS3nIfnc3FdX7KJIP2X5Swd7mhrfjiuc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OmFk+bD2; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706502565; x=1738038565; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=3EK/8yxeed8m7k4dlgjD0V/NjwPLMBHE+69C12MTZ18=; b=OmFk+bD2PXX+IfN88vXweFzYh5e5D0jSpW6UMakb4VbR+ai1EC+PUw1w jOqlcWdM8lswiiO6SKlH8z0cwMypgQeQeLPZunNSBNHGHg6uwd4wLIXq8 8cJFJcLVy91sGktP6Na8qKB8i6Hb6+QidF84a8g84wM0XmjCkfkjB6hx0 ArR8/0nVjbXdah8nYPSM7WhPd0YfVZnK2nuFvU1h6a/roQ1UDIeYttSZc MH0u43LuHt7xSWjhJIvu8WQc9IVTVADAhn+J368yUkSLg+gl/ii1R9GF/ LznAK6Z9lRlNHDMZf8t15GrruMzuhxqXtka1NU3xiHILOncDxJNdC8bev A==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="9521283" X-IronPort-AV: E=Sophos;i="6.05,226,1701158400"; d="scan'208";a="9521283" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2024 20:29:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,226,1701158400"; d="scan'208";a="3229390" Received: from binbinwu-mobl.ccr.corp.intel.com (HELO [10.238.10.49]) ([10.238.10.49]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2024 20:29:21 -0800 Message-ID: <56882cd9-67f5-4396-b91b-52fb202d3386@linux.intel.com> Date: Mon, 29 Jan 2024 12:29:18 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v18 047/121] KVM: x86/mmu: Add a private pointer to struct kvm_mmu_page To: isaku.yamahata@intel.com Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com References: <3a97d83c79350c4a2ae10de86270ee8f8d0bf1e2.1705965635.git.isaku.yamahata@intel.com> From: Binbin Wu In-Reply-To: <3a97d83c79350c4a2ae10de86270ee8f8d0bf1e2.1705965635.git.isaku.yamahata@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/23/2024 7:53 AM, isaku.yamahata@intel.com wrote: > From: Isaku Yamahata > > For private GPA, CPU refers a private page table whose contents are > encrypted. The dedicated APIs to operate on it (e.g. updating/reading its > PTE entry) are used and their cost is expensive. > > When KVM resolves KVM page fault, it walks the page tables. To reuse the > existing KVM MMU code and mitigate the heavy cost to directly walk private > page table, allocate one more page to copy the dummy page table for KVM MMU > code to directly walk. Resolve KVM page fault with the existing code, and > do additional operations necessary for the private page table. To > distinguish such cases, the existing KVM page table is called a shared page > table (i.e. not associated with private page table), and the page table > with private page table is called a private page table. The relationship > is depicted below. > > Add a private pointer to struct kvm_mmu_page for private page table and > add helper functions to allocate/initialize/free a private page table > page. > > KVM page fault | > | | > V | > -------------+---------- | > | | | > V V | > shared GPA private GPA | > | | | > V V | > shared PT root dummy PT root | private PT root > | | | | > V V | V > shared PT dummy PT ----propagate----> private PT > | | | | > | \-----------------+------\ | > | | | | > V | V V > shared guest page | private guest page > | > non-encrypted memory | encrypted memory > | > PT: page table > - Shared PT is visible to KVM and it is used by CPU. > - Private PT is used by CPU but it is invisible to KVM. > - Dummy PT is visible to KVM but not used by CPU. It is used to > propagate PT change to the actual private PT which is used by CPU. Nit: one typo below. Reviewed-by: Binbin Wu > > Signed-off-by: Isaku Yamahata > --- > arch/x86/include/asm/kvm_host.h | 5 ++ > arch/x86/kvm/mmu/mmu.c | 7 +++ > arch/x86/kvm/mmu/mmu_internal.h | 83 +++++++++++++++++++++++++++++++-- > arch/x86/kvm/mmu/tdp_mmu.c | 1 + > 4 files changed, 92 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index 0cdbbc21136b..1d074956ac0d 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -841,6 +841,11 @@ struct kvm_vcpu_arch { > struct kvm_mmu_memory_cache mmu_shadow_page_cache; > struct kvm_mmu_memory_cache mmu_shadowed_info_cache; > struct kvm_mmu_memory_cache mmu_page_header_cache; > + /* > + * This cache is to allocate private page table. E.g. Secure-EPT used > + * by the TDX module. > + */ > + struct kvm_mmu_memory_cache mmu_private_spt_cache; > > /* > * QEMU userspace and the guest each have their own FPU state. > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index 583ae9d6bf5d..32c619125be4 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -685,6 +685,12 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) > 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); > if (r) > return r; > + if (kvm_gfn_shared_mask(vcpu->kvm)) { > + r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_private_spt_cache, > + PT64_ROOT_MAX_LEVEL); > + if (r) > + return r; > + } > r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, > PT64_ROOT_MAX_LEVEL); > if (r) > @@ -704,6 +710,7 @@ static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) > kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); > kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); > kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadowed_info_cache); > + kvm_mmu_free_memory_cache(&vcpu->arch.mmu_private_spt_cache); > kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); > } > > diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h > index 97af4e39ce6f..957654c3cde9 100644 > --- a/arch/x86/kvm/mmu/mmu_internal.h > +++ b/arch/x86/kvm/mmu/mmu_internal.h > @@ -101,7 +101,23 @@ struct kvm_mmu_page { > int root_count; > refcount_t tdp_mmu_root_count; > }; > - unsigned int unsync_children; > + union { > + struct { > + unsigned int unsync_children; > + /* > + * Number of writes since the last time traversal > + * visited this page. > + */ > + atomic_t write_flooding_count; > + }; > +#ifdef CONFIG_KVM_MMU_PRIVATE > + /* > + * Associated private shadow page table, e.g. Secure-EPT page > + * passed to the TDX module. > + */ > + void *private_spt; > +#endif > + }; > union { > struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ > tdp_ptep_t ptep; > @@ -124,9 +140,6 @@ struct kvm_mmu_page { > int clear_spte_count; > #endif > > - /* Number of writes since the last time traversal visited this page. */ > - atomic_t write_flooding_count; > - > #ifdef CONFIG_X86_64 > /* Used for freeing the page asynchronously if it is a TDP MMU page. */ > struct rcu_head rcu_head; > @@ -150,6 +163,68 @@ static inline bool is_private_sp(const struct kvm_mmu_page *sp) > return kvm_mmu_page_role_is_private(sp->role); > } > > +#ifdef CONFIG_KVM_MMU_PRIVATE > +static inline void *kvm_mmu_private_spt(struct kvm_mmu_page *sp) > +{ > + return sp->private_spt; > +} > + > +static inline void kvm_mmu_init_private_spt(struct kvm_mmu_page *sp, void *private_spt) > +{ > + sp->private_spt = private_spt; > +} > + > +static inline void kvm_mmu_alloc_private_spt(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) > +{ > + bool is_root = vcpu->arch.root_mmu.root_role.level == sp->role.level; > + > + KVM_BUG_ON(!kvm_mmu_page_role_is_private(sp->role), vcpu->kvm); > + if (is_root) > + /* > + * Because TDX module assigns root Secure-EPT page and set it to > + * Secure-EPTP when TD vcpu is created, secure page table for > + * root isn't needed. > + */ > + sp->private_spt = NULL; > + else { > + /* > + * Because the TDX module doesn't trust VMM and initializes > + * the pages itself, KVM doesn't initialize them. Allocate > + * pages with garbage and give them to the TDX module. > + */ > + sp->private_spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_private_spt_cache); > + /* > + * Because mmu_private_spt_cache is topped up before staring kvm s/staring/starting > + * page fault resolving, the allocation above shouldn't fail. > + */ > + WARN_ON_ONCE(!sp->private_spt); > + } > +} > + > +static inline void kvm_mmu_free_private_spt(struct kvm_mmu_page *sp) > +{ > + if (sp->private_spt) > + free_page((unsigned long)sp->private_spt); > +} > +#else > +static inline void *kvm_mmu_private_spt(struct kvm_mmu_page *sp) > +{ > + return NULL; > +} > + > +static inline void kvm_mmu_init_private_spt(struct kvm_mmu_page *sp, void *private_spt) > +{ > +} > + > +static inline void kvm_mmu_alloc_private_spt(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) > +{ > +} > + > +static inline void kvm_mmu_free_private_spt(struct kvm_mmu_page *sp) > +{ > +} > +#endif > + > static inline bool kvm_mmu_page_ad_need_write_protect(struct kvm_mmu_page *sp) > { > /* > diff --git a/arch/x86/kvm/mmu/tdp_mmu.c b/arch/x86/kvm/mmu/tdp_mmu.c > index 87233b3ceaef..d47f0daf1b03 100644 > --- a/arch/x86/kvm/mmu/tdp_mmu.c > +++ b/arch/x86/kvm/mmu/tdp_mmu.c > @@ -53,6 +53,7 @@ void kvm_mmu_uninit_tdp_mmu(struct kvm *kvm) > > static void tdp_mmu_free_sp(struct kvm_mmu_page *sp) > { > + kvm_mmu_free_private_spt(sp); > free_page((unsigned long)sp->spt); > kmem_cache_free(mmu_page_header_cache, sp); > }