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From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Tue, 30 Jan 2024 10:52:54 +0000
Message-ID: <CA+V-a8ux+AfF4rTmfr448Gp_=_M2TczsZ5_j2afk9qRFs3ePGQ@mail.gmail.com>
Subject: Re: [PATCH v6 1/4] pinctrl: renesas: rzg2l: Improve code for readability
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Magnus Damm <magnus.damm@gmail.com>, Linus Walleij <linus.walleij@linaro.org>, 
	Rob Herring <robh+dt@kernel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, 
	linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, 
	linux-gpio@vger.kernel.org, Biju Das <biju.das.jz@bp.renesas.com>, 
	Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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HI Geert,

Thank you for the review.

On Tue, Jan 30, 2024 at 10:35=E2=80=AFAM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Mon, Jan 29, 2024 at 2:56=E2=80=AFPM Prabhakar <prabhakar.csengg@gmail=
com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > As the RZ/G2L pinctrl driver is extensively utilized by numerous SoCs a=
nd
> > has experienced substantial growth, enhance code readability by
> > incorporating FIELD_PREP_CONST/FIELD_GET macros wherever necessary.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-pinctrl for v6.9.
>
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
>
> > @@ -90,14 +93,18 @@
> >   * (b * 8) and f is the pin configuration capabilities supported.
> >   */
> >  #define RZG2L_SINGLE_PIN               BIT(31)
> > +#define RZG2L_SINGLE_PIN_INDEX_MASK    GENMASK(30, 24)
> > +#define RZG2L_SINGLE_PIN_BITS_MASK     GENMASK(22, 20)
> > +
> >  #define RZG2L_SINGLE_PIN_PACK(p, b, f) (RZG2L_SINGLE_PIN | \
> > -                                        ((p) << 24) | ((b) << 20) | (f=
))
> > -#define RZG2L_SINGLE_PIN_GET_BIT(x)    (((x) & GENMASK(22, 20)) >> 20)
> > +                                        FIELD_PREP_CONST(RZG2L_SINGLE_=
PIN_INDEX_MASK, (p)) | \
> > +                                        FIELD_PREP_CONST(RZG2L_SINGLE_=
PIN_BITS_MASK, (b)) | \
> > +                                        FIELD_PREP_CONST(PIN_CFG_MASK,=
 (f)))
> >
> > -#define RZG2L_PIN_CFG_TO_CAPS(cfg)             ((cfg) & GENMASK(19, 0)=
)
> > +#define RZG2L_PIN_CFG_TO_CAPS(cfg)             ((cfg) & PIN_CFG_MASK)
>
> Do you mind if I drop RZG2L_PIN_CFG_TO_CAPS() and replace its two
> users by FIELD_GET(PIN_CFG_MASK, *pin_data) while applying?
>
Fine by me.

Cheers,
Prabhakar

> >  #define RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg)      ((cfg) & RZG2L_SINGLE_P=
IN ? \
> > -                                               (((cfg) & GENMASK(30, 2=
4)) >> 24) : \
> > -                                               (((cfg) & GENMASK(26, 2=
0)) >> 20))
> > +                                                FIELD_GET(RZG2L_SINGLE=
_PIN_INDEX_MASK, (cfg)) : \
> > +                                                FIELD_GET(PIN_CFG_PIN_=
REG_MASK, (cfg)))
> >
> >  #define P(off)                 (0x0000 + (off))
> >  #define PM(off)                        (0x0100 + (off) * 2)
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m6=
8k.org
>
> In personal conversations with technical people, I call myself a hacker. =
But
> when I'm talking to journalists I just say "programmer" or something like=
 that.
>                                 -- Linus Torvalds