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a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1706631973; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KHefnsd9D4gYX0qAxPmeOq8/AUrqApnE1/2yVtKtDLA=; b=hCZ6saHYA6y3Zsd5NXxtzwGzUET9QacqNfdOUt1tCO+tbv3SW4H5ptbP47LgaGWxtqSfZh V8B/K6k43g1Six52BKuv19DSNEVyis9IIk1olfGwFn7lS1rrAxwBNHK/USKOfIPt5VrFlM y5rsArfBJUYbD7LtiYxP9PoxW2+oh+e6EL0iyHZnR+eJ8azqUdtR0EYuIF+sRqhqRKQ+wD SIdeE50k5La7/d5eSZKio15W+sZBXBceqanyEJ8AWseJearIjH/qUM1IJmj2g6BjPfmw84 nXd+NVmaOg7qP6h3/ku5KOz2vZytwR4jJZ2khTavotlbCn8Ousnb9yv3KL8Brg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1706631973; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KHefnsd9D4gYX0qAxPmeOq8/AUrqApnE1/2yVtKtDLA=; b=mGyOX15gaqYFCfyOT/KoNVJvr3jwb8Ljph6ESWwQEUaLgnuXQT+ZwURmcSlmyQc4Jq2C3a hHTFjHghjZENj/Ag== From: "tip-bot2 for Kim Phillips" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/sev] x86/speculation: Do not enable Automatic IBRS if SEV-SNP is enabled Cc: Kim Phillips , Michael Roth , "Borislav Petkov (AMD)" , Dave Hansen , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240126041126.1927228-3-michael.roth@amd.com> References: <20240126041126.1927228-3-michael.roth@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170663197187.398.15168561144334587796.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The following commit has been merged into the x86/sev branch of tip: Commit-ID: acaa4b5c4c854b5009f4d4a5395b2609ad0f4937 Gitweb: https://git.kernel.org/tip/acaa4b5c4c854b5009f4d4a5395b2609ad0f4937 Author: Kim Phillips AuthorDate: Thu, 25 Jan 2024 22:11:02 -06:00 Committer: Borislav Petkov (AMD) CommitterDate: Mon, 29 Jan 2024 17:19:01 +01:00 x86/speculation: Do not enable Automatic IBRS if SEV-SNP is enabled Without SEV-SNP, Automatic IBRS protects only the kernel. But when SEV-SNP is enabled, the Automatic IBRS protection umbrella widens to all host-side code, including userspace. This protection comes at a cost: reduced userspace indirect branch performance. To avoid this performance loss, don't use Automatic IBRS on SEV-SNP hosts and all back to retpolines instead. [ mdr: squash in changes from review discussion. ] Signed-off-by: Kim Phillips Signed-off-by: Michael Roth Signed-off-by: Borislav Petkov (AMD) Acked-by: Dave Hansen Link: https://lore.kernel.org/r/20240126041126.1927228-3-michael.roth@amd.com --- arch/x86/kernel/cpu/common.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 0b97bcd..9e35e27 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1355,8 +1355,13 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) /* * AMD's AutoIBRS is equivalent to Intel's eIBRS - use the Intel feature * flag and protect from vendor-specific bugs via the whitelist. + * + * Don't use AutoIBRS when SNP is enabled because it degrades host + * userspace indirect branch performance. */ - if ((ia32_cap & ARCH_CAP_IBRS_ALL) || cpu_has(c, X86_FEATURE_AUTOIBRS)) { + if ((ia32_cap & ARCH_CAP_IBRS_ALL) || + (cpu_has(c, X86_FEATURE_AUTOIBRS) && + !cpu_feature_enabled(X86_FEATURE_SEV_SNP))) { setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED); if (!cpu_matches(cpu_vuln_whitelist, NO_EIBRS_PBRSB) && !(ia32_cap & ARCH_CAP_PBRSB_NO))