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[147.75.199.223]) by mx.google.com with ESMTPS id jp14-20020ad45f8e000000b00685430548bdsi3207473qvb.420.2024.01.30.09.01.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 09:01:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-45004-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=KwFWN1hn; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-45004-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-45004-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 6F5321C250AC for ; Tue, 30 Jan 2024 17:00:47 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 53934128391; Tue, 30 Jan 2024 17:00:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KwFWN1hn" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 968534C91; Tue, 30 Jan 2024 17:00:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706634039; cv=none; b=g3xBYMdlpAkUuGggSsNG6FGKuS0gA+Vb0eTyVuSMGS8177aSwYwjOzIW5EV271W0xSjiYH2nWqDmHEnUiimrDn4J6b6eNPUnb2a2Ltj3WnjOndwB3jmEi0Ichc9GeAf6uZjTiwj+J7rvqLh1f/0AKDUjUEz2u96YGToUZvvPbPM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706634039; c=relaxed/simple; bh=U87bCcFSOgRyrEHR9PXAH9v+rPbsTxU36k70hrY8xuA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=D3ZMBVsQnEOC1/8TnfSEVqx2d8T6xuQq+uYVX24BG79pp4i13jpQbxpz87Viik2LCqZTYSB/aGb8iYiwwT6iiXTJa1yszG8UvRRK/pZzA5E4PDprLl/Bgc38jNyosxBHYXM06UZrrk3nTwkeia20N/TMXiKatj3d70R1efNZUiE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KwFWN1hn; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93F17C433F1; Tue, 30 Jan 2024 17:00:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706634039; bh=U87bCcFSOgRyrEHR9PXAH9v+rPbsTxU36k70hrY8xuA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=KwFWN1hn06iN8rel+xJ4i95+hnpz4SPWmRhTTgb0jNGOzme6BffbOm6IYgBtTqvmm hS8BctFiQVbo6Fo/26fWRAXur6AUOS2voENpsBEUfnOKWQqH3GPATjx+Pw2vWgBPoJ IQ80LoM4SvGAS4IvlzJdHjSojLr4R9i1I1mhBT1AXEDcraMWizr+SqrXpM5EbGP32l TEN1E0uOXU3/tzxYgXnsQ9x6R4Vkvp78Qx0926Zj2lTVeeLfFWRhOEdQRcv+eytNd8 Vpcq5iQ1o2Nh9PgSBHEzatc1fWJnlW6nXi/lpWjtBq4bwALXvAzKqxDr3h1FLu2BnP 24Is/XHZ9e9sA== Date: Tue, 30 Jan 2024 22:30:34 +0530 From: Vinod Koul To: Adam Ford Cc: dri-devel@lists.freedesktop.org, Lucas Stach , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V2 2/2] phy: freescale: add Samsung HDMI PHY Message-ID: References: <20240106221907.325127-1-aford173@gmail.com> <20240106221907.325127-2-aford173@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240106221907.325127-2-aford173@gmail.com> Hi Adam, On 06-01-24, 16:19, Adam Ford wrote: > From: Lucas Stach > > This adds the driver for the Samsung HDMI PHY found on the > i.MX8MP SoC. > > Signed-off-by: Lucas Stach > Signed-off-by: Adam Ford > --- > V2: Fixed some whitespace found from checkpatch > Change error handling when enabling apbclk to use dev_err_probe > Rebase on Linux-Next > > I (Adam) tried to help move this along, so I took Lucas' patch and > attempted to apply fixes based on feedback. I don't have > all the history, so apologies for that. > > diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig > index 853958fb2c06..5c2b73042dfc 100644 > --- a/drivers/phy/freescale/Kconfig > +++ b/drivers/phy/freescale/Kconfig > @@ -35,6 +35,12 @@ config PHY_FSL_IMX8M_PCIE > Enable this to add support for the PCIE PHY as found on > i.MX8M family of SOCs. > > +config PHY_FSL_SAMSUNG_HDMI_PHY > + tristate "Samsung HDMI PHY support" > + depends on OF && HAS_IOMEM > + help > + Enable this to add support for the Samsung HDMI PHY in i.MX8MP. > + > endif > > config PHY_FSL_LYNX_28G > diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Makefile > index cedb328bc4d2..dbcafdcc8751 100644 > --- a/drivers/phy/freescale/Makefile > +++ b/drivers/phy/freescale/Makefile > @@ -3,4 +3,5 @@ obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o > obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o > obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o > obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o > +obj-$(CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY) += phy-fsl-samsung-hdmi.o > obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o > diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > new file mode 100644 > index 000000000000..54e93ea898f7 > --- /dev/null > +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > @@ -0,0 +1,1078 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2020 NXP > + * Copyright 2022 Pengutronix, Lucas Stach > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define HDMI_TX_CONTROL0 0x200 > +#define HDMI_TX_CONTROL_PHY_PWRDWN BIT(3) > + > +#define PHY_REG_33 0x84 > +#define REG33_MODE_SET_DONE BIT(7) > +#define REG33_FIX_DA BIT(1) > + > +#define PHY_REG_34 0x88 > +#define REG34_PHY_READY BIT(7) > +#define REG34_PLL_LOCK BIT(6) > +#define REG34_PHY_CLK_READY BIT(5) > + > + > +#define PHY_PLL_REGS_NUM 48 > + > +struct phy_config { > + u32 clk_rate; > + u8 regs[PHY_PLL_REGS_NUM]; > +}; > + > +const struct phy_config phy_pll_cfg[] = { > + { 22250000, { > + 0x00, 0xD1, 0x4B, 0xF1, 0x89, 0x88, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x15, 0x25, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, can we please have lower case hex values > + }, > + }, { > + 23750000, { > + 0x00, 0xD1, 0x50, 0xF1, 0x86, 0x85, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x03, 0x25, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 24000000, { > + 0x00, 0xD1, 0x50, 0xF0, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x01, 0x25, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 24024000, { > + 0x00, 0xD1, 0x50, 0xF1, 0x99, 0x02, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x00, 0x25, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 25175000, { > + 0x00, 0xD1, 0x54, 0xFC, 0xCC, 0x91, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xF5, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 25200000, { > + 0x00, 0xD1, 0x54, 0xF0, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xF4, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 26750000, { > + 0x00, 0xD1, 0x5A, 0xF2, 0x89, 0x88, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xE6, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 27000000, { > + 0x00, 0xD1, 0x5A, 0xF0, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xE4, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 27027000, { > + 0x00, 0xD1, 0x5A, 0xF2, 0xFD, 0x0C, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xE4, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 29500000, { > + 0x00, 0xD1, 0x62, 0xF4, 0x95, 0x08, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xD1, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 30750000, { > + 0x00, 0xD1, 0x66, 0xF4, 0x82, 0x01, 0x88, 0x45, > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xC8, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 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0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 180000000, { > + 0x00, 0xD1, 0x4B, 0x10, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x89, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 185625000, { > + 0x00, 0xD1, 0x4E, 0x12, 0x9A, 0x95, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x85, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 188000000, { > + 0x00, 0xD1, 0x4E, 0x12, 0xA7, 0x10, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x83, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 198000000, { > + 0x00, 0xD1, 0x52, 0x12, 0x82, 0x01, 0x88, 0x47, > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x7D, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 205000000, { > + 0x00, 0xD1, 0x55, 0x12, 0x8C, 0x05, 0x90, 0x4B, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xF0, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 209500000, { > + 0x00, 0xD1, 0x57, 0x12, 0x98, 0x07, 0x90, 0x49, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xEB, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 213000000, { > + 0x00, 0xD1, 0x58, 0x12, 0x84, 0x03, 0x82, 0x41, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE7, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 216000000, { > + 0x00, 0xD1, 0x5A, 0x10, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE4, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 216216000, { > + 0x00, 0xD1, 0x5A, 0x12, 0xFD, 0x0C, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE4, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 237600000, { > + 0x00, 0xD1, 0x63, 0x10, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xCF, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 254000000, { > + 0x00, 0xD1, 0x69, 0x14, 0x89, 0x08, 0x80, 0x40, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xC2, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 277500000, { > + 0x00, 0xD1, 0x73, 0x15, 0x88, 0x05, 0x90, 0x4D, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xB2, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 288000000, { > + 0x00, 0xD1, 0x78, 0x10, 0x00, 0x00, 0x80, 0x00, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xAB, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, { > + 297000000, { > + 0x00, 0xD1, 0x7B, 0x15, 0x84, 0x03, 0x90, 0x45, > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xA6, 0x24, 0x80, > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > + }, > + }, > +}; what is the source of these values. do we know what they represent ? > + > +struct fsl_samsung_hdmi_phy { > + struct device *dev; > + void __iomem *regs; > + struct clk *apbclk; > + struct clk *refclk; > + > + /* clk provider */ > + struct clk_hw hw; > + const struct phy_config *cur_cfg; > +}; > + > +static inline struct fsl_samsung_hdmi_phy * > +to_fsl_samsung_hdmi_phy(struct clk_hw *hw) > +{ > + return container_of(hw, struct fsl_samsung_hdmi_phy, hw); > +} > + > +static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, > + const struct phy_config *cfg) > +{ > + int i, ret; > + u8 val; > + > + /* HDMI PHY init */ > + writeb(REG33_FIX_DA, phy->regs + PHY_REG_33); > + > + for (i = 0; i < PHY_PLL_REGS_NUM; i++) > + writeb(cfg->regs[i], phy->regs + i * 4); > + > + writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG_33); > + > + ret = readb_poll_timeout(phy->regs + PHY_REG_34, val, > + val & REG34_PLL_LOCK, > + 50, 20000); > + if (ret) > + dev_err(phy->dev, "PLL failed to lock\n"); > + > + return ret; > +} > + > +static unsigned long phy_clk_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + struct fsl_samsung_hdmi_phy *phy = to_fsl_samsung_hdmi_phy(hw); > + > + if (!phy->cur_cfg) > + return 74250000; > + > + return phy->cur_cfg->clk_rate; > +} > + > +static long phy_clk_round_rate(struct clk_hw *hw, > + unsigned long rate, unsigned long *parent_rate) > +{ > + int i; > + > + for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--) > + if (phy_pll_cfg[i].clk_rate <= rate) > + return phy_pll_cfg[i].clk_rate; > + > + return -EINVAL; > +} > + > +static int phy_clk_set_rate(struct clk_hw *hw, > + unsigned long rate, unsigned long parent_rate) > +{ > + struct fsl_samsung_hdmi_phy *phy = to_fsl_samsung_hdmi_phy(hw); > + int i; > + > + for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--) > + if (phy_pll_cfg[i].clk_rate <= rate) > + break; > + > + if (i < 0) > + return -EINVAL; > + > + phy->cur_cfg = &phy_pll_cfg[i]; > + > + return fsl_samsung_hdmi_phy_configure(phy, phy->cur_cfg); > +} > + > +static const struct clk_ops phy_clk_ops = { > + .recalc_rate = phy_clk_recalc_rate, > + .round_rate = phy_clk_round_rate, > + .set_rate = phy_clk_set_rate, > +}; > + > +static int phy_clk_register(struct fsl_samsung_hdmi_phy *phy) > +{ > + struct device *dev = phy->dev; > + struct device_node *np = dev->of_node; > + struct clk_init_data init; > + const char *parent_name; > + struct clk *phyclk; > + int ret; > + > + parent_name = __clk_get_name(phy->refclk); > + > + init.parent_names = &parent_name; > + init.num_parents = 1; > + init.flags = 0; > + init.name = "hdmi_pclk"; > + init.ops = &phy_clk_ops; > + > + phy->hw.init = &init; > + > + phyclk = devm_clk_register(dev, &phy->hw); > + if (IS_ERR(phyclk)) > + return dev_err_probe(dev, PTR_ERR(phyclk), > + "failed to register clock\n"); > + > + ret = of_clk_add_provider(np, of_clk_src_simple_get, phyclk); > + if (ret) > + return dev_err_probe(dev, ret, > + "failed to register clock provider\n"); > + > + return 0; > +} > + > +static int fsl_samsung_hdmi_phy_probe(struct platform_device *pdev) > +{ > + struct fsl_samsung_hdmi_phy *phy; > + int ret; > + > + phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); > + if (!phy) > + return -ENOMEM; > + > + platform_set_drvdata(pdev, phy); > + phy->dev = &pdev->dev; > + > + phy->regs = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(phy->regs)) > + return PTR_ERR(phy->regs); > + > + phy->apbclk = devm_clk_get(phy->dev, "apb"); > + if (IS_ERR(phy->apbclk)) > + return dev_err_probe(phy->dev, PTR_ERR(phy->apbclk), > + "failed to get apb clk\n"); > + > + phy->refclk = devm_clk_get(phy->dev, "ref"); > + if (IS_ERR(phy->refclk)) > + return dev_err_probe(phy->dev, PTR_ERR(phy->refclk), > + "failed to get ref clk\n"); > + > + ret = clk_prepare_enable(phy->apbclk); > + if (ret) { > + return dev_err_probe(phy->dev, PTR_ERR(phy->apbclk), > + "failed to enable apbclk\n"); > + } > + > + pm_runtime_get_noresume(phy->dev); > + pm_runtime_set_active(phy->dev); > + pm_runtime_enable(phy->dev); > + > + ret = phy_clk_register(phy); > + if (ret) { > + dev_err(&pdev->dev, "register clk failed\n"); > + goto register_clk_failed; > + } > + > + pm_runtime_put(phy->dev); > + > + return 0; > + > +register_clk_failed: > + clk_disable_unprepare(phy->apbclk); > + > + return ret; > +} > + > +static int fsl_samsung_hdmi_phy_remove(struct platform_device *pdev) > +{ > + of_clk_del_provider(pdev->dev.of_node); > + > + return 0; > +} > + > +#ifdef CONFIG_PM > +static int fsl_samsung_hdmi_phy_suspend(struct device *dev) > +{ > + struct fsl_samsung_hdmi_phy *phy = dev_get_drvdata(dev); > + > + clk_disable_unprepare(phy->apbclk); > + > + return 0; > +} > + > +static int fsl_samsung_hdmi_phy_resume(struct device *dev) > +{ > + struct fsl_samsung_hdmi_phy *phy = dev_get_drvdata(dev); > + int ret = 0; > + > + ret = clk_prepare_enable(phy->apbclk); > + if (ret) { > + dev_err(phy->dev, "failed to enable apbclk\n"); > + return ret; > + } > + > + if (phy->cur_cfg) > + ret = fsl_samsung_hdmi_phy_configure(phy, phy->cur_cfg); > + > + return ret; > + > +} > +#endif we can drop this #ifdef and use __maybe annontation for pm ops > + > +static const struct dev_pm_ops fsl_samsung_hdmi_phy_pm_ops = { > + SET_RUNTIME_PM_OPS(fsl_samsung_hdmi_phy_suspend, > + fsl_samsung_hdmi_phy_resume, NULL) > + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, > + pm_runtime_force_resume) > +}; > + > +static const struct of_device_id fsl_samsung_hdmi_phy_of_match[] = { > + { > + .compatible = "fsl,imx8mp-hdmi-phy", > + }, { > + /* sentinel */ > + } > +}; > +MODULE_DEVICE_TABLE(of, fsl_samsung_hdmi_phy_of_match); > + > +static struct platform_driver fsl_samsung_hdmi_phy_driver = { > + .probe = fsl_samsung_hdmi_phy_probe, > + .remove = fsl_samsung_hdmi_phy_remove, > + .driver = { > + .name = "fsl-samsung-hdmi-phy", > + .of_match_table = fsl_samsung_hdmi_phy_of_match, > + .pm = &fsl_samsung_hdmi_phy_pm_ops, > + }, > +}; > +module_platform_driver(fsl_samsung_hdmi_phy_driver); > + > +MODULE_AUTHOR("Sandor Yu "); > +MODULE_DESCRIPTION("SAMSUNG HDMI 2.0 Transmitter PHY Driver"); > +MODULE_LICENSE("GPL v2"); > -- > 2.43.0 -- ~Vinod