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Date: Tue, 30 Jan 2024 12:05:41 -0500 (EST)
From: Charles Perry <charles.perry@savoirfairelinux.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: mdf <mdf@kernel.org>, hao wu <hao.wu@intel.com>, 
	yilun xu <yilun.xu@intel.com>, trix <trix@redhat.com>, 
	krzysztof kozlowski+dt <krzysztof.kozlowski+dt@linaro.org>, 
	Brian CODY <bcody@markem-imaje.com>, 
	Allen VANDIVER <avandiver@markem-imaje.com>, 
	linux-fpga <linux-fpga@vger.kernel.org>, 
	devicetree <devicetree@vger.kernel.org>, 
	linux-kernel <linux-kernel@vger.kernel.org>
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In-Reply-To: <32669bc7-90b5-48d9-8845-2e072a477c6e@linaro.org>
References: <20240129225602.3832449-1-charles.perry@savoirfairelinux.com> <20240129225602.3832449-2-charles.perry@savoirfairelinux.com> <f3cfffa0-5089-4bf7-b424-d5e949e36d67@linaro.org> <1489222458.382780.1706629544559.JavaMail.zimbra@savoirfairelinux.com> <32669bc7-90b5-48d9-8845-2e072a477c6e@linaro.org>
Subject: Re: [PATCH 2/3] dt-bindings: fpga: xlnx,fpga-slave-selectmap: add
 DT schema
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Thread-Topic: dt-bindings: fpga: xlnx,fpga-slave-selectmap: add DT schema
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----- On Jan 30, 2024, at 11:05 AM, Krzysztof Kozlowski krzysztof.kozlowski=
@linaro.org wrote:

> On 30/01/2024 16:45, Charles Perry wrote:
>>=20
>>>> +
>>>> +  reg:
>>>> +    description:
>>>> +      At least 1 byte of memory mapped IO
>>>> +    maxItems: 1
>>>> +
>>>> +  prog_b-gpios:
>>>
>>>
>>> No underscores in names.
>>>
>>=20
>> This is heavily based on "xlnx,fpga-slave-serial.yaml" which uses an und=
erscore.
>> I can use a dash instead but that would make things inconsistent across =
the two
>> schemas.
>=20
> Inconsistency is not a problem. Duplicating technical debt is.
>=20
>>=20
>>>
>>>> +    description:
>>>> +      config pin (referred to as PROGRAM_B in the manual)
>>>> +    maxItems: 1
>>>> +
>>>> +  done-gpios:
>>>> +    description:
>>>> +      config status pin (referred to as DONE in the manual)
>>>> +    maxItems: 1
>>>> +
>>>> +  init-b-gpios:
>>>
>>> Is there init-a? Open other bindings and look how these are called ther=
e.
>>>
>>=20
>> No, the "-b" is there to denote that the signal is active low. I think i=
ts
>> shorthand
>> for "bar" which is the overline (=E2=80=BE) that electronic engineer put=
 on top of the
>> name of the
>> signal on schematics. It comes from the datasheet.
>=20
> Then just "init-gpios"
>=20
> ...
>=20
>>>> +required:
>>>> +  - compatible
>>>> +  - reg
>>>> +  - prog_b-gpios
>>>> +  - done-gpios
>>>> +  - init-b-gpios
>>>> +
>>>> +additionalProperties: true
>>>
>>> Nope, this cannot bue true.
>>>
>>=20
>> Ok, I'll put this to false but I'm not quite sure I understand the impli=
cations.
>>=20
>> My reasoning behind assigning this to true was that the FPGA is an exter=
nal
>> device on a bus that needs to be configured by a bus controller. The bus
>> controller
>> would be the parent of the fpga DT node and the later would contain prop=
erties
>> parsed by the bus controller driver.
>=20
> Which bus controller? MMIO bus does not parse children properties.
> Anyway, if that's the case you miss $ref to respective
> peripheral-props.yaml matching your bus and then "unevaluatedProperties:
> false".

This one: https://elixir.bootlin.com/linux/v6.8-rc2/source/Documentation/de=
vicetree/bindings/bus/imx-weim.txt#L56

>=20
> Best regards,
> Krzysztof

Regards,
Charles