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Donenfeld" Date: Tue, 30 Jan 2024 19:31:42 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/2] x86/random: Issue a warning if RDRAND or RDSEED fails To: =?UTF-8?Q?Daniel_P=2E_Berrang=C3=A9?= Cc: Dave Hansen , "Reshetova, Elena" , "Kirill A. Shutemov" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "x86@kernel.org" , "Theodore Ts'o" , Kuppuswamy Sathyanarayanan , "Nakajima, Jun" , Tom Lendacky , "Kalra, Ashish" , Sean Christopherson , "linux-coco@lists.linux.dev" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Jan 30, 2024 at 7:06=E2=80=AFPM Daniel P. Berrang=C3=A9 wrote: > > On Tue, Jan 30, 2024 at 06:49:15PM +0100, Jason A. Donenfeld wrote: > > On Tue, Jan 30, 2024 at 6:32=E2=80=AFPM Dave Hansen wrote: > > > > > > On 1/30/24 05:45, Reshetova, Elena wrote: > > > >> You're the Intel employee so you can find out about this with much > > > >> more assurance than me, but I understand the sentence above to be = _way > > > >> more_ true for RDRAND than for RDSEED. If your informed opinion is= , > > > >> "RDRAND failing can only be due to totally broken hardware" > > > > No, this is not the case per Intel SDM. I think we can live under a= simple > > > > assumption that both of these instructions can fail not just due to= broken > > > > HW, but also due to enough pressure put into the whole DRBG constru= ction > > > > that supplies random numbers via RDRAND/RDSEED. > > > > > > I don't think the SDM is the right thing to look at for guidance here= . > > > > > > Despite the SDM allowing it, we (software) need RDRAND/RDSEED failure= s > > > to be exceedingly rare by design. If they're not, we're going to get > > > our trusty torches and pitchforks and go after the folks who built th= e > > > broken hardware. > > > > > > Repeat after me: > > > > > > Regular RDRAND/RDSEED failures only occur on broken hardware > > > > > > If it's nice hardware that's gone bad, then we WARN() and try to make > > > the best of it. If it turns out that WARN() was because of a broken > > > hardware _design_ then we go sharpen the pitchforks. > > > > > > Anybody disagree? > > > > Yes, I disagree. I made a trivial test that shows RDSEED breaks easily > > in a busy loop. So at the very least, your statement holds true only > > for RDRAND. > > > > But, anyway, if the statement "RDRAND failures only occur on broken > > hardware" is true, then a WARN() in the failure path there presents no > > DoS potential of any kind, and so that's a straightforward conclusion > > to this discussion. However, that really hinges on "RDRAND failures > > only occur on broken hardware" being a true statement. > > There's a useful comment here from an Intel engineer > > https://web.archive.org/web/20190219074642/https://software.intel.com/en-= us/blogs/2012/11/17/the-difference-between-rdrand-and-rdseed > > "RDRAND is, indeed, faster than RDSEED because it comes > from a hardware-based pseudorandom number generator. > One seed value (effectively, the output from one RDSEED > command) can provide up to 511 128-bit random values > before forcing a reseed" > > We know we can exhaust RDSEED directly pretty trivially. Making your > test program run in parallel across 20 cpus, I got a mere 3% success > rate from RDSEED. > > If RDRAND is reseeding every 511 values, RDRAND output would have > to be consumed significantly faster than RDSEED in order that the > reseed will happen frequently enough to exhaust the seeds. > > This looks pretty hard, but maybe with a large enough CPU count > this will be possible in extreme load ? So what this suggests is that the guest-guest DoS caused by looping forever (or panic-on-warn'ing) is at least possible on large enough hardware for some non-zero amount of time, depending on whatever hard to hit environmental factors. Another approach would be to treat this as a hardware flaw, in that the RDRAND does not provide a universally reliable interface, and so something like CoCo doesn't work with the current design, and so Intel should issue some microcode updates that gives some separated pools and separated rate limiting on a per-VMX ring 0 basis. Or something like that. I dunno; maybe it's unrealistic to hope Intel will repair their interface. But I think we've got to acknowledge that it's sort of broken/irreliable. Jason