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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240130180040.GA527428@bhelgaas> On Tue, Jan 30, 2024 at 12:00:40PM -0600, Bjorn Helgaas wrote: > On Tue, Jan 30, 2024 at 12:25:06PM +0530, Manivannan Sadhasivam wrote: > > On Mon, Jan 29, 2024 at 04:41:20PM +0200, Abel Vesa wrote: > > > Add the compatible and the driver data for X1E80100. > > > > If you happen to respin the series, please add info about the PCIe controller > > found on this SoC. Like IP version, Gen speed, max. link width etc... > > FWIW, I always prefer actual speeds, e.g., "8 GT/s", instead of things > like "Gen3", for the reason mentioned in the spec: > > Terms like "PCIe Gen3" are ambiguous and should be avoided. For > example, "gen3" could mean (1) compliant with Base 3.0, (2) > compliant with Base 3.1 (last revision of 3.x), (3) compliant with > Base 3.0 and supporting 8.0 GT/s, (4) compliant with Base 3.0 or > later and supporting 8.0 GT/s, .... > Makes sense. Will keep a note of it, thanks! - Mani -- மணிவண்ணன் சதாசிவம்