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0mslfht1JyMf5dUi38RQI/fOO0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3-1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Tue, 2024-01-30 at 11:04 -0800, Charlie Jenkins wrote: > On riscv it is guaranteed that the address returned by mmap is less > than > the hint address. Allow mmap to return an address all the way up to > addr, if provided, rather than just up to the lower address space. >=20 > This provides a performance benefit as well, allowing mmap to exit > after > checking that the address is in range rather than searching for a > valid > address. >=20 > It is possible to provide an address that uses at most the same > number > of bits, however it is significantly more computationally expensive > to > provide that number rather than setting the max to be the hint > address. > There is the instruction clz/clzw in Zbb that returns the highest set > bit > which could be used to performantly implement this, but it would > still > be slower than the current implementation. At worst case, half of the > address would not be able to be allocated when a hint address is > provided. >=20 > Signed-off-by: Charlie Jenkins > --- > =C2=A0arch/riscv/include/asm/processor.h | 22 +++++++++------------- > =C2=A01 file changed, 9 insertions(+), 13 deletions(-) >=20 > diff --git a/arch/riscv/include/asm/processor.h > b/arch/riscv/include/asm/processor.h > index f19f861cda54..5d966ae81a58 100644 > --- a/arch/riscv/include/asm/processor.h > +++ b/arch/riscv/include/asm/processor.h > @@ -22,14 +22,12 @@ > =C2=A0({ \ > =C2=A0 unsigned long > mmap_end; \ > =C2=A0 typeof(addr) _addr =3D (addr); \ > - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && > is_compat_task())) \ > - mmap_end =3D STACK_TOP_MAX; \ > - else if ((_addr) >=3D VA_USER_SV57) \ > - mmap_end =3D STACK_TOP_MAX; \ > - else if ((((_addr) >=3D VA_USER_SV48)) && (VA_BITS >=3D > VA_BITS_SV48)) \ > - mmap_end =3D VA_USER_SV48; \ > + if ((_addr) =3D=3D 0 || \ > + =C2=A0=C2=A0=C2=A0 (IS_ENABLED(CONFIG_COMPAT) && is_compat_task()) || \ > + =C2=A0=C2=A0=C2=A0 ((_addr + len) > BIT(VA_BITS - > 1))) \ > + mmap_end =3D STACK_TOP_MAX \ > =C2=A0 else \ > - mmap_end =3D VA_USER_SV39; \ > + mmap_end =3D (_addr + len); \ > =C2=A0 mmap_end; \ > =C2=A0}) > =C2=A0 > @@ -39,14 +37,12 @@ > =C2=A0 typeof(addr) _addr =3D (addr); \ > =C2=A0 typeof(base) _base =3D (base); \ > =C2=A0 unsigned long rnd_gap =3D DEFAULT_MAP_WINDOW - (_base); \ > - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && > is_compat_task())) \ > + if ((_addr) =3D=3D 0 || \ > + =C2=A0=C2=A0=C2=A0 (IS_ENABLED(CONFIG_COMPAT) && is_compat_task()) || \ > + =C2=A0=C2=A0=C2=A0 ((_addr + len) > BIT(VA_BITS - > 1))) \ > =C2=A0 mmap_base =3D (_base); \ > - else if (((_addr) >=3D VA_USER_SV57) && (VA_BITS >=3D > VA_BITS_SV57)) \ > - mmap_base =3D VA_USER_SV57 - rnd_gap; \ > - else if ((((_addr) >=3D VA_USER_SV48)) && (VA_BITS >=3D > VA_BITS_SV48)) \ > - mmap_base =3D VA_USER_SV48 - rnd_gap; \ > =C2=A0 else \ > - mmap_base =3D VA_USER_SV39 - rnd_gap; \ > + mmap_base =3D (_addr + len) - rnd_gap; \ Please mind that rnd_gap can be non-zero, in this case, the map will fail. It will be better to let mmap_base =3D min((_addr + len), (base) + TASK_SIZE - DEFAULT_MAP_WINDOW) . > =C2=A0 mmap_base; \ > =C2=A0}) > =C2=A0 >=20