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Tue, 30 Jan 2024 18:45:07 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240106221907.325127-1-aford173@gmail.com> <20240106221907.325127-2-aford173@gmail.com> In-Reply-To: From: Adam Ford Date: Tue, 30 Jan 2024 20:44:56 -0600 Message-ID: Subject: Re: [PATCH V2 2/2] phy: freescale: add Samsung HDMI PHY To: Vinod Koul Cc: dri-devel@lists.freedesktop.org, Lucas Stach , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Jan 30, 2024 at 11:00=E2=80=AFAM Vinod Koul wrot= e: > > Hi Adam, > > On 06-01-24, 16:19, Adam Ford wrote: > > From: Lucas Stach > > > > This adds the driver for the Samsung HDMI PHY found on the > > i.MX8MP SoC. > > > > Signed-off-by: Lucas Stach > > Signed-off-by: Adam Ford > > --- > > V2: Fixed some whitespace found from checkpatch > > Change error handling when enabling apbclk to use dev_err_probe > > Rebase on Linux-Next > > > > I (Adam) tried to help move this along, so I took Lucas' patch and > > attempted to apply fixes based on feedback. I don't have > > all the history, so apologies for that. > > > > diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kcon= fig > > index 853958fb2c06..5c2b73042dfc 100644 > > --- a/drivers/phy/freescale/Kconfig > > +++ b/drivers/phy/freescale/Kconfig > > @@ -35,6 +35,12 @@ config PHY_FSL_IMX8M_PCIE > > Enable this to add support for the PCIE PHY as found on > > i.MX8M family of SOCs. > > > > +config PHY_FSL_SAMSUNG_HDMI_PHY > > + tristate "Samsung HDMI PHY support" > > + depends on OF && HAS_IOMEM > > + help > > + Enable this to add support for the Samsung HDMI PHY in i.MX8MP. > > + > > endif > > > > config PHY_FSL_LYNX_28G > > diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Mak= efile > > index cedb328bc4d2..dbcafdcc8751 100644 > > --- a/drivers/phy/freescale/Makefile > > +++ b/drivers/phy/freescale/Makefile > > @@ -3,4 +3,5 @@ obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) +=3D phy-fsl-imx8= mq-usb.o > > obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) +=3D phy-fsl-imx8qm-lvds-phy.o > > obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) +=3D phy-fsl-imx8-mipi-dphy.o > > obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) +=3D phy-fsl-imx8m-pcie.o > > +obj-$(CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY) +=3D phy-fsl-samsung-hdmi.o > > obj-$(CONFIG_PHY_FSL_LYNX_28G) +=3D phy-fsl-lynx-28g.o > > diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy= /freescale/phy-fsl-samsung-hdmi.c > > new file mode 100644 > > index 000000000000..54e93ea898f7 > > --- /dev/null > > +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > > @@ -0,0 +1,1078 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright 2020 NXP > > + * Copyright 2022 Pengutronix, Lucas Stach > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define HDMI_TX_CONTROL0 0x200 > > +#define HDMI_TX_CONTROL_PHY_PWRDWN BIT(3) > > + > > +#define PHY_REG_33 0x84 > > +#define REG33_MODE_SET_DONE BIT(7) > > +#define REG33_FIX_DA BIT(1) > > + > > +#define PHY_REG_34 0x88 > > +#define REG34_PHY_READY BIT(7) > > +#define REG34_PLL_LOCK BIT(6) > > +#define REG34_PHY_CLK_READY BIT(5) > > + > > + > > +#define PHY_PLL_REGS_NUM 48 > > + > > +struct phy_config { > > + u32 clk_rate; > > + u8 regs[PHY_PLL_REGS_NUM]; > > +}; > > + > > +const struct phy_config phy_pll_cfg[] =3D { > > + { 22250000, { > > + 0x00, 0xD1, 0x4B, 0xF1, 0x89, 0x88, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x15, 0x25, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > can we please have lower case hex values I'll update that for the next revision. > > > + }, > > + }, { > > + 23750000, { > > + 0x00, 0xD1, 0x50, 0xF1, 0x86, 0x85, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x03, 0x25, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 24000000, { > > + 0x00, 0xD1, 0x50, 0xF0, 0x00, 0x00, 0x80, 0x00, > > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x01, 0x25, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 24024000, { > > + 0x00, 0xD1, 0x50, 0xF1, 0x99, 0x02, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x00, 0x00, 0x25, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 25175000, { > > + 0x00, 0xD1, 0x54, 0xFC, 0xCC, 0x91, 0x80, 0x40, > > + 0x4F, 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0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 140000000, { > > + 0x00, 0xD1, 0x75, 0x36, 0xA7, 0x90, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0xB0, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x83, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 144000000, { > > + 0x00, 0xD1, 0x78, 0x30, 0x00, 0x00, 0x80, 0x00, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0xAB, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x83, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 148352000, { > > + 0x00, 0xD1, 0x7B, 0x35, 0xDB, 0x39, 0x90, 0x45, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0xA6, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x83, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 148500000, { > > + 0x00, 0xD1, 0x7B, 0x35, 0x84, 0x03, 0x90, 0x45, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0xA6, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x83, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 154000000, { > > + 0x00, 0xD1, 0x40, 0x18, 0x83, 0x01, 0x00, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0xA0, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 157000000, { > > + 0x00, 0xD1, 0x41, 0x11, 0xA7, 0x14, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x9D, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 160000000, { > > + 0x00, 0xD1, 0x42, 0x12, 0xA1, 0x20, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x9A, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 162000000, { > > + 0x00, 0xD1, 0x43, 0x18, 0x8B, 0x08, 0x96, 0x55, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x98, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 164000000, { > > + 0x00, 0xD1, 0x45, 0x11, 0x83, 0x82, 0x90, 0x4B, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x96, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 165000000, { > > + 0x00, 0xD1, 0x45, 0x11, 0x84, 0x81, 0x90, 0x4B, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x95, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 180000000, { > > + 0x00, 0xD1, 0x4B, 0x10, 0x00, 0x00, 0x80, 0x00, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x89, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 185625000, { > > + 0x00, 0xD1, 0x4E, 0x12, 0x9A, 0x95, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x85, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 188000000, { > > + 0x00, 0xD1, 0x4E, 0x12, 0xA7, 0x10, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x83, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 198000000, { > > + 0x00, 0xD1, 0x52, 0x12, 0x82, 0x01, 0x88, 0x47, > > + 0x4F, 0x30, 0x33, 0x65, 0x20, 0x7D, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 205000000, { > > + 0x00, 0xD1, 0x55, 0x12, 0x8C, 0x05, 0x90, 0x4B, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xF0, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 209500000, { > > + 0x00, 0xD1, 0x57, 0x12, 0x98, 0x07, 0x90, 0x49, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xEB, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 213000000, { > > + 0x00, 0xD1, 0x58, 0x12, 0x84, 0x03, 0x82, 0x41, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE7, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 216000000, { > > + 0x00, 0xD1, 0x5A, 0x10, 0x00, 0x00, 0x80, 0x00, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE4, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 216216000, { > > + 0x00, 0xD1, 0x5A, 0x12, 0xFD, 0x0C, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE4, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 237600000, { > > + 0x00, 0xD1, 0x63, 0x10, 0x00, 0x00, 0x80, 0x00, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xCF, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 254000000, { > > + 0x00, 0xD1, 0x69, 0x14, 0x89, 0x08, 0x80, 0x40, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xC2, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 277500000, { > > + 0x00, 0xD1, 0x73, 0x15, 0x88, 0x05, 0x90, 0x4D, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xB2, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 288000000, { > > + 0x00, 0xD1, 0x78, 0x10, 0x00, 0x00, 0x80, 0x00, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xAB, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, { > > + 297000000, { > > + 0x00, 0xD1, 0x7B, 0x15, 0x84, 0x03, 0x90, 0x45, > > + 0x4F, 0x30, 0x33, 0x65, 0x30, 0xA6, 0x24, 0x80, > > + 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, > > + 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, > > + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > + 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, > > + }, > > + }, > > +}; > > what is the source of these values. do we know what they represent ? I didn't write the original driver, but looking at the imx8MP Tech Ref Manual, there are 47 PHY registers named PHY_REG1 through PHY_REG47, and each are 8-bits wide. This is basically a lookup table which sets the PHY registers based on the desired clock. The manual documents what each register is responsible for doing, but they didn't give them interesting names. adam > > > + > > +struct fsl_samsung_hdmi_phy { > > + struct device *dev; > > + void __iomem *regs; > > + struct clk *apbclk; > > + struct clk *refclk; > > + > > + /* clk provider */ > > + struct clk_hw hw; > > + const struct phy_config *cur_cfg; > > +}; > > + > > +static inline struct fsl_samsung_hdmi_phy * > > +to_fsl_samsung_hdmi_phy(struct clk_hw *hw) > > +{ > > + return container_of(hw, struct fsl_samsung_hdmi_phy, hw); > > +} > > + > > +static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy = *phy, > > + const struct phy_config *cfg) > > +{ > > + int i, ret; > > + u8 val; > > + > > + /* HDMI PHY init */ > > + writeb(REG33_FIX_DA, phy->regs + PHY_REG_33); > > + > > + for (i =3D 0; i < PHY_PLL_REGS_NUM; i++) > > + writeb(cfg->regs[i], phy->regs + i * 4); > > + > > + writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG_33= ); > > + > > + ret =3D readb_poll_timeout(phy->regs + PHY_REG_34, val, > > + val & REG34_PLL_LOCK, > > + 50, 20000); > > + if (ret) > > + dev_err(phy->dev, "PLL failed to lock\n"); > > + > > + return ret; > > +} > > + > > +static unsigned long phy_clk_recalc_rate(struct clk_hw *hw, > > + unsigned long parent_rate) > > +{ > > + struct fsl_samsung_hdmi_phy *phy =3D to_fsl_samsung_hdmi_phy(hw); > > + > > + if (!phy->cur_cfg) > > + return 74250000; > > + > > + return phy->cur_cfg->clk_rate; > > +} > > + > > +static long phy_clk_round_rate(struct clk_hw *hw, > > + unsigned long rate, unsigned long *parent_= rate) > > +{ > > + int i; > > + > > + for (i =3D ARRAY_SIZE(phy_pll_cfg) - 1; i >=3D 0; i--) > > + if (phy_pll_cfg[i].clk_rate <=3D rate) > > + return phy_pll_cfg[i].clk_rate; > > + > > + return -EINVAL; > > +} > > + > > +static int phy_clk_set_rate(struct clk_hw *hw, > > + unsigned long rate, unsigned long parent_rate= ) > > +{ > > + struct fsl_samsung_hdmi_phy *phy =3D to_fsl_samsung_hdmi_phy(hw); > > + int i; > > + > > + for (i =3D ARRAY_SIZE(phy_pll_cfg) - 1; i >=3D 0; i--) > > + if (phy_pll_cfg[i].clk_rate <=3D rate) > > + break; > > + > > + if (i < 0) > > + return -EINVAL; > > + > > + phy->cur_cfg =3D &phy_pll_cfg[i]; > > + > > + return fsl_samsung_hdmi_phy_configure(phy, phy->cur_cfg); > > +} > > + > > +static const struct clk_ops phy_clk_ops =3D { > > + .recalc_rate =3D phy_clk_recalc_rate, > > + .round_rate =3D phy_clk_round_rate, > > + .set_rate =3D phy_clk_set_rate, > > +}; > > + > > +static int phy_clk_register(struct fsl_samsung_hdmi_phy *phy) > > +{ > > + struct device *dev =3D phy->dev; > > + struct device_node *np =3D dev->of_node; > > + struct clk_init_data init; > > + const char *parent_name; > > + struct clk *phyclk; > > + int ret; > > + > > + parent_name =3D __clk_get_name(phy->refclk); > > + > > + init.parent_names =3D &parent_name; > > + init.num_parents =3D 1; > > + init.flags =3D 0; > > + init.name =3D "hdmi_pclk"; > > + init.ops =3D &phy_clk_ops; > > + > > + phy->hw.init =3D &init; > > + > > + phyclk =3D devm_clk_register(dev, &phy->hw); > > + if (IS_ERR(phyclk)) > > + return dev_err_probe(dev, PTR_ERR(phyclk), > > + "failed to register clock\n"); > > + > > + ret =3D of_clk_add_provider(np, of_clk_src_simple_get, phyclk); > > + if (ret) > > + return dev_err_probe(dev, ret, > > + "failed to register clock provider\n= "); > > + > > + return 0; > > +} > > + > > +static int fsl_samsung_hdmi_phy_probe(struct platform_device *pdev) > > +{ > > + struct fsl_samsung_hdmi_phy *phy; > > + int ret; > > + > > + phy =3D devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); > > + if (!phy) > > + return -ENOMEM; > > + > > + platform_set_drvdata(pdev, phy); > > + phy->dev =3D &pdev->dev; > > + > > + phy->regs =3D devm_platform_ioremap_resource(pdev, 0); > > + if (IS_ERR(phy->regs)) > > + return PTR_ERR(phy->regs); > > + > > + phy->apbclk =3D devm_clk_get(phy->dev, "apb"); > > + if (IS_ERR(phy->apbclk)) > > + return dev_err_probe(phy->dev, PTR_ERR(phy->apbclk), > > + "failed to get apb clk\n"); > > + > > + phy->refclk =3D devm_clk_get(phy->dev, "ref"); > > + if (IS_ERR(phy->refclk)) > > + return dev_err_probe(phy->dev, PTR_ERR(phy->refclk), > > + "failed to get ref clk\n"); > > + > > + ret =3D clk_prepare_enable(phy->apbclk); > > + if (ret) { > > + return dev_err_probe(phy->dev, PTR_ERR(phy->apbclk), > > + "failed to enable apbclk\n"); > > + } > > + > > + pm_runtime_get_noresume(phy->dev); > > + pm_runtime_set_active(phy->dev); > > + pm_runtime_enable(phy->dev); > > + > > + ret =3D phy_clk_register(phy); > > + if (ret) { > > + dev_err(&pdev->dev, "register clk failed\n"); > > + goto register_clk_failed; > > + } > > + > > + pm_runtime_put(phy->dev); > > + > > + return 0; > > + > > +register_clk_failed: > > + clk_disable_unprepare(phy->apbclk); > > + > > + return ret; > > +} > > + > > +static int fsl_samsung_hdmi_phy_remove(struct platform_device *pdev) > > +{ > > + of_clk_del_provider(pdev->dev.of_node); > > + > > + return 0; > > +} > > + > > +#ifdef CONFIG_PM > > +static int fsl_samsung_hdmi_phy_suspend(struct device *dev) > > +{ > > + struct fsl_samsung_hdmi_phy *phy =3D dev_get_drvdata(dev); > > + > > + clk_disable_unprepare(phy->apbclk); > > + > > + return 0; > > +} > > + > > +static int fsl_samsung_hdmi_phy_resume(struct device *dev) > > +{ > > + struct fsl_samsung_hdmi_phy *phy =3D dev_get_drvdata(dev); > > + int ret =3D 0; > > + > > + ret =3D clk_prepare_enable(phy->apbclk); > > + if (ret) { > > + dev_err(phy->dev, "failed to enable apbclk\n"); > > + return ret; > > + } > > + > > + if (phy->cur_cfg) > > + ret =3D fsl_samsung_hdmi_phy_configure(phy, phy->cur_cfg)= ; > > + > > + return ret; > > + > > +} > > +#endif > > we can drop this #ifdef and use __maybe annontation for pm ops > > > + > > +static const struct dev_pm_ops fsl_samsung_hdmi_phy_pm_ops =3D { > > + SET_RUNTIME_PM_OPS(fsl_samsung_hdmi_phy_suspend, > > + fsl_samsung_hdmi_phy_resume, NULL) > > + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, > > + pm_runtime_force_resume) > > +}; > > + > > +static const struct of_device_id fsl_samsung_hdmi_phy_of_match[] =3D { > > + { > > + .compatible =3D "fsl,imx8mp-hdmi-phy", > > + }, { > > + /* sentinel */ > > + } > > +}; > > +MODULE_DEVICE_TABLE(of, fsl_samsung_hdmi_phy_of_match); > > + > > +static struct platform_driver fsl_samsung_hdmi_phy_driver =3D { > > + .probe =3D fsl_samsung_hdmi_phy_probe, > > + .remove =3D fsl_samsung_hdmi_phy_remove, > > + .driver =3D { > > + .name =3D "fsl-samsung-hdmi-phy", > > + .of_match_table =3D fsl_samsung_hdmi_phy_of_match, > > + .pm =3D &fsl_samsung_hdmi_phy_pm_ops, > > + }, > > +}; > > +module_platform_driver(fsl_samsung_hdmi_phy_driver); > > + > > +MODULE_AUTHOR("Sandor Yu "); > > +MODULE_DESCRIPTION("SAMSUNG HDMI 2.0 Transmitter PHY Driver"); > > +MODULE_LICENSE("GPL v2"); > > -- > > 2.43.0 > > -- > ~Vinod