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From: Maxim Kiselev <bigunclemax@gmail.com>
Date: Wed, 31 Jan 2024 19:34:25 +0300
Message-ID: <CALHCpMjkfvmN4i98FW1HxH+tNoOCsMJFwjwmLR6WqRvhizZGKg@mail.gmail.com>
Subject: Re: [PATCH v8 1/3] dt-bindings: pwm: Add binding for Allwinner
 D1/T113-S3/R329 PWM controller
To: Aleksandr Shubin <privatesub2@gmail.com>
Cc: linux-kernel@vger.kernel.org, Conor Dooley <conor.dooley@microchip.com>, 
	=?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= <u.kleine-koenig@pengutronix.de>, 
	Rob Herring <robh+dt@kernel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, 
	Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, 
	Samuel Holland <samuel@sholland.org>, Paul Walmsley <paul.walmsley@sifive.com>, 
	Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, 
	Philipp Zabel <p.zabel@pengutronix.de>, Marc Kleine-Budde <mkl@pengutronix.de>, 
	Cristian Ciocaltea <cristian.ciocaltea@collabora.com>, John Watts <contact@jookia.org>, 
	Cheo Fusi <fusibrandon13@gmail.com>, linux-pwm@vger.kernel.org, 
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, 
	linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org
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Hi Aleksandr,

=D1=81=D1=80, 31 =D1=8F=D0=BD=D0=B2. 2024=E2=80=AF=D0=B3. =D0=B2 15:59, Ale=
ksandr Shubin <privatesub2@gmail.com>:
>
> Allwinner's D1, T113-S3 and R329 SoCs have a new pwm
> controller witch is different from the previous pwm-sun4i.
>
> The D1 and T113 are identical in terms of peripherals,
> they differ only in the architecture of the CPU core, and
> even share the majority of their DT. Because of that,
> using the same compatible makes sense.
> The R329 is a different SoC though, and should have
> a different compatible string added, especially as there
> is a difference in the number of channels.
>
> D1 and T113s SoCs have one PWM controller with 8 channels.
> R329 SoC has two PWM controllers in both power domains, one of
> them has 9 channels (CPUX one) and the other has 6 (CPUS one).
>
> Add a device tree binding for them.
>
> Signed-off-by: Aleksandr Shubin <privatesub2@gmail.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/pwm/allwinner,sun20i-pwm.yaml | 88 +++++++++++++++++++
> 1 file changed, 88 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/allwinner,sun20i=
-pwm.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.y=
aml b/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml
> new file mode 100644
> index 000000000000..716f75776006
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/allwinner,sun20i-pwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner D1, T113-S3 and R329 PWM
> +
> +maintainers:
> + - Aleksandr Shubin <privatesub2@gmail.com>
> + - Brandon Cheo Fusi <fusibrandon13@gmail.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: allwinner,sun20i-d1-pwm
> + - items:
> + - const: allwinner,sun20i-r329-pwm

According to the bsp sdk and other mainline drivers for
R329 SoC, the sun50i prefix should be used instead the sun20i

> + - const: allwinner,sun20i-d1-pwm
> +
> + reg:
> + maxItems: 1
> +
> + "#pwm-cells":
> + const: 3
> +
> + clocks:
> + items:
> + - description: Bus clock
> + - description: 24 MHz oscillator
> + - description: APB0 clock
> +
> + clock-names:
> + items:
> + - const: bus
> + - const: hosc
> + - const: apb0
> +
> + resets:
> + maxItems: 1
> +
> + allwinner,pwm-channels:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The number of PWM channels configured for this instance
> + enum: [6, 9]
> +
> +allOf:
> + - $ref: pwm.yaml#
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: allwinner,sun20i-r329-pwm

Same here.

> + then:
> + required:
> + - allwinner,pwm-channels
> +
> + else:
> + properties:
> + allwinner,pwm-channels: false
> +
> +unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - "#pwm-cells"
> + - clocks
> + - clock-names
> + - resets
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/sun20i-d1-ccu.h>
> + #include <dt-bindings/reset/sun20i-d1-ccu.h>
> +
> + pwm: pwm@2000c00 {
> + compatible =3D "allwinner,sun20i-d1-pwm";
> + reg =3D <0x02000c00 0x400>;
> + clocks =3D <&ccu CLK_BUS_PWM>, <&dcxo>, <&ccu CLK_APB0>;
> + clock-names =3D "bus", "hosc", "apb0";
> + resets =3D <&ccu RST_BUS_PWM>;
> + #pwm-cells =3D <0x3>;
> + };
> +
> +...
> --
> 2.25.1
>

Best regards,
Maksim