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Date: Wed, 31 Jan 2024 14:09:15 -0600
From: Rob Herring <robh@kernel.org>
To: Michal Simek <michal.simek@amd.com>
Cc: michal.simek@xilinx.com, linux-kernel@vger.kernel.org,
	Wu Hao <hao.wu@intel.com>, Tom Rix <trix@redhat.com>,
	git@xilinx.com, Moritz Fischer <mdf@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, monstr@monstr.eu,
	Xu Yilun <yilun.xu@intel.com>,
	"open list:FPGA MANAGER FRAMEWORK" <linux-fpga@vger.kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v4] dt-bindings: fpga: Convert fpga-region binding to yaml
Message-ID: <170673175226.2219463.1221634595095812617.robh@kernel.org>
References: <37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530726.git.michal.simek@amd.com>
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On Mon, 29 Jan 2024 13:18:53 +0100, Michal Simek wrote:
> Convert the generic fpga region DT binding to json-schema.
> There are some differences compare to txt version.
> 1. DT overlay can't be described in example that's why directly include
> information from overlay to node which was referenced. It is visible in
> example with /* DT Overlay contains: &... */
> 
> 2. All example have been rewritten to be simpler and describe only full
> reconfiguration and partial reconfiguration with one bridge.
> Completely drop the case where fpga region can inside partial
> reconfiguration region which is already described in description
> 
> 3. Fixed some typos in descriptions compare to txt version but most of it
> is just c&p from txt file.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
> Changes in v4:
> - permit only object type as additionalProperties
> - describe also optional reg/ranges properties and remove required
>   #address/size-cells properties
> 
> Changes in v3:
> - drop fpga bridge and mgr descriptions in example
> - use additionalProperties: true
> - use fixed-factor-clock instead
> - fixed matching pattern
> 
> Changes in v2:
> - Fix typo in subject
> - Fix comment in bridge example
> - Change license back to gpl-2.0 only
> - Do not define firware-name type and add maxItems 1
> - Make fpga-bridge phandle-array
> - Drop ranges property because of missing reg property of fpga-region
> - Also describe case with fixed clock node and axi bus
> - Fix fpga-region names in example
> 
> Please let me know if there is a way to describe overlays to dt root to be
> able to reference fpga region back.
> 
> fpga-region without MMIO access is also permitted that's why there is no
> need to describe reg/ranges and #.*cells properties for these cases.
> 
> ---
>  .../devicetree/bindings/fpga/fpga-region.txt  | 479 ------------------
>  .../devicetree/bindings/fpga/fpga-region.yaml | 358 +++++++++++++
>  2 files changed, 358 insertions(+), 479 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.txt
>  create mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.yaml
> 

Applied, thanks!