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Wed, 31 Jan 2024 12:44:53 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240131-mbly-clk-v4-0-bcd00510d6a0@bootlin.com> In-Reply-To: <20240131-mbly-clk-v4-0-bcd00510d6a0@bootlin.com> From: Linus Walleij Date: Wed, 31 Jan 2024 21:44:42 +0100 Message-ID: Subject: Re: [PATCH v4 00/18] Add support for Mobileye EyeQ5 system controller To: =?UTF-8?B?VGjDqW8gTGVicnVu?= Cc: Gregory CLEMENT , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Bogendoerfer , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Philipp Zabel , Vladimir Kondratiev , linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , linux-gpio@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Theo, thanks for your patches! A *new* MIPS platform, not every day I see this! On Wed, Jan 31, 2024 at 5:27=E2=80=AFPM Th=C3=A9o Lebrun wrote: > Pin control is about controlling bias, drive strength and muxing. The > latter allows two functions per pin; the first function is always GPIO > while the second one is pin-dependent. There exists two banks, each > handled in a separate driver instance. Each pin maps to one pin group. > That makes pin & group indexes the same, simplifying logic. Can the three pin control patches be merged separately? (It looks like.) That would make my job easier when we ge there. I will try to look closer at each patch! Yours, Linus Walleij