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charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.12.4 On Wed, 24 Jan 2024 19:38:56 -0600, Sam Protsenko wrote: > When SPI transfer is being prepared, the spi-s3c64xx driver will call > clk_set_rate() to change the rate of SPI source clock (IPCLK). But IPCLK > is a gate (leaf) clock, so it must propagate the rate change up the > clock tree, so that corresponding DIV clocks can actually change their > divider values. Add CLK_SET_RATE_PARENT flag to corresponding clocks for > all SPI instances in Exynos850 (spi_0, spi_1 and spi_2) to make it > possible. This change involves next clocks: > > [...] Applied, thanks! [1/3] clk: samsung: exynos850: Propagate SPI IPCLK rate change https://git.kernel.org/krzk/linux/c/67c15187d4910ee353374676d4dddf09d8cb227e Best regards, -- Krzysztof Kozlowski