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[147.75.80.249]) by mx.google.com with ESMTPS id hg10-20020a170906f34a00b00a31fffd9498si6382082ejb.965.2024.02.01.03.24.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Feb 2024 03:24:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-48007-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-48007-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-48007-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id CEECF1F25283 for ; Thu, 1 Feb 2024 11:24:28 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A004B15D5A5; Thu, 1 Feb 2024 11:24:17 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8DEDA15CD52; Thu, 1 Feb 2024 11:24:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706786657; cv=none; b=jzltFvIyEjrfPg7wZ1UvX/060Rrfox0IuC/ntZ07/Af1nuis4lYRKzzY77dZ82Yb/wwVDMxqshk8bHML1iA3LDErVwL7skpTumgmNwMRsUpHn54Ddrdyzxv3hsIh56CofX7EFwDD+okx0MDwXxsLmosWmThJHYpsS9Qb7ty643s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706786657; c=relaxed/simple; bh=uZUoJTXUOtGTmSyrM1RM4G9rWHINL+HQGMIgwpk5Gdk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=B+CwVJY5XUuG/bHGjcvtw7LceCq7zqI6dgi30ALwO8xt43Xjm+ed68fmHGjuNHe/V1LyZUtJYnnAypK7FVI1cyYywUYKJPxobMG9ZMLNjeQINGooqb15RIX4h/TvgZIQHt0XVzsDLDiU3wUUb1h2bX2Uag1XLETY3RRJmyT2nUw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9273FDA7; Thu, 1 Feb 2024 03:24:56 -0800 (PST) Received: from pluto (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D0C5F3F762; Thu, 1 Feb 2024 03:19:41 -0800 (PST) Date: Thu, 1 Feb 2024 11:19:30 +0000 From: Cristian Marussi To: Peng Fan Cc: Linus Walleij , "Peng Fan (OSS)" , "souvik.chakravarty@arm.com" , Sudeep Holla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oleksii Moisieiev , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , dl-linux-imx , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , AKASHI Takahiro , Rob Herring Subject: Re: [PATCH v3 0/6] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support Message-ID: References: <20240121-pinctrl-scmi-v3-0-8d94ba79dca8@nxp.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Feb 01, 2024 at 07:14:17AM +0000, Peng Fan wrote: > > Subject: Re: [PATCH v3 0/6] firmware: arm_scmi: Add SCMI v3.2 pincontrol > > protocol basic support > > Hi Peng, > > On Mon, Jan 29, 2024 at 1:37 PM Peng Fan wrote: > > > > > And for i.MX95 OEM extenstion, do you have any suggestions? > > > I have two points: > > > 1. use vendor compatible. This would also benefit when supporting > > > vendor protocol. > > > 2. Introduce a property saying supporting-generic-pinconf > > > > > > How do you think? > > > > While I don't know how OEM extensions to SCMI were designed, the pin > > control subsystem has the philosophy that extensions are for minor fringe > > stuff, such as a pin config option that no other silicon is using and thus have > > no use for anyone else. Well that is actually all the custom extensions we > > have. > > (This notion is even carried over to SCMI pinctrl.) > > > > The i.MX95 OEM extension is really odd to me, it looks like a > > reimplementation of the core aspects of SCMI pin control, and looks much > > more like the old i.MX drivers than like the SCMI driver. > > i.MX SCMI pin protocol conf settings follows non-SCMI pin conf settings. > It is not just a matter of using custom SCMI OEM types, it is the whole layout/definitions of the i.MX pin/groups/funcs DT bindings that deviates from the generic DT bindings layout as handled and expected by the Linux Pinctrl subsystem (AFAIU), while the SCMI Pinctrl driver as it stands in this series, was conceived, designed and implemented originally by Oleksii to just use the generic existing Pinctrl DT bindings; as a consequence, in your i.MX extensions, you had to add a dedicated i.MX DT parser to interpret the protocol@19 DT snippet in a completely different way, to try to stick your custom solution on top of the generic one. Thanks, Cristian > > > > But I sure cannot speak of what is allowed in SCMI OEM extensions or not. > > + SPEC owner, Souvik. Any comments? > > Thanks, > Peng. > > > > > Yours, > > Linus Walleij