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01 Feb 2024 03:59:32 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rVVbz-00000000p6M-3icn; Thu, 01 Feb 2024 13:52:07 +0200 Date: Thu, 1 Feb 2024 13:52:07 +0200 From: Andy Shevchenko To: Rengarajan.S@microchip.com Cc: Kumaravel.Thiagarajan@microchip.com, jiaqing.zhao@linux.intel.com, gregkh@linuxfoundation.org, ilpo.jarvinen@linux.intel.com, john.ogness@linutronix.de, tony@atomide.com, linux-kernel@vger.kernel.org, Tharunkumar.Pasumarthi@microchip.com, jirislaby@kernel.org, f.fainelli@gmail.com, tglx@linutronix.de, UNGLinuxDriver@microchip.com, linux-serial@vger.kernel.org Subject: Re: [PATCH v1 tty] 8250: microchip: Add 4 Mbps support in PCI1XXXX UART Message-ID: References: <20240125100619.154873-1-rengarajan.s@microchip.com> <8406d8866968950b9bb2f2c01aaa92e3107a7a00.camel@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <8406d8866968950b9bb2f2c01aaa92e3107a7a00.camel@microchip.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Tue, Jan 30, 2024 at 10:52:41AM +0000, Rengarajan.S@microchip.com wrote: > On Sun, 2024-01-28 at 17:27 +0200, Andy Shevchenko wrote: > > On Thu, Jan 25, 2024 at 03:36:19PM +0530, Rengarajan S wrote: .. > > > +???? /* > > > +????? * Microchip PCI1XXXX UART supports maximum baud rate up to 4 > > > Mbps > > > +????? */ > > > +???? if (up->port.type == PORT_MCHP16550A) > > > +???????????? max = 4000000; > > > > No. Please refactor the way the 8250_port won't be modified. > > > > Also you have a define for this constant, use it. > > The current UART clk in MCHP Ports in pci1xxxx.c is set to 62.5 MHz in > order to support fractional baud rates which enables generation of > acceptable baud rate and lower error percentage from any available > frequency. With 62.5 MHz the maximum supported baud rate supported as > per serial_8250_get_baud_rate is 3.9 Mbps. In order to extend the > support to 4 Mbps we had hardcoded the max value to 4 Mbps. Since, baud > rate is calculated here we needed to make these changes in 8250_port > and could not find a way to handle as part 8250_pci1xxxx. Can you let > us know any alternatives to address this upper(max) limit? Update port->uartclk accordingly in your driver, see how other 8250_* drivers do that (e.g., 8250_mid). So, it will no go with hack in the 8250_port. -- With Best Regards, Andy Shevchenko