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01 Feb 2024 07:03:00 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rVY5G-00000000rG3-3PRt; Thu, 01 Feb 2024 16:30:30 +0200 Date: Thu, 1 Feb 2024 16:30:30 +0200 From: Andy Shevchenko To: Arturas Moskvinas Cc: linus.walleij@linaro.org, biju.das.jz@bp.renesas.com, akaessens@gmail.com, thomas.preston@codethink.co.uk, preid@electromag.com.au, u.kleine-koenig@pengutronix.de, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] pinctrl: mcp23s08: Check only GPIOs which have interrupts enabled Message-ID: References: <20240201141406.32484-2-arturas.moskvinas@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240201141406.32484-2-arturas.moskvinas@gmail.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Thu, Feb 01, 2024 at 04:14:07PM +0200, Arturas Moskvinas wrote: > GPINTEN register contains information about GPIOs with enabled > interrupts no need to check other GPIOs for changes. > > Signed-off-by: Arturas Moskvinas > --- You forgot to add a changelog here, but no need to resend, just you can respond to the email since it's not a big issue in this case. .. > + if (mcp_read(mcp, MCP_GPINTEN, &gpinten)) > + goto unlock; Do all hw variants have this register available? Esp. I2C part, wouldn't it be problematic (exception with NACK on the bus)? .. The rest LGTM, thanks! -- With Best Regards, Andy Shevchenko