Received-SPF: pass (google.com: domain of linux-kernel+bounces-48425-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1;
Message-ID: <d2ff1f95-709b-4dbd-b0a0-639193f18c2c@intel.com>
Date: Thu, 1 Feb 2024 23:42:45 +0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 2/2] x86/cpu/intel: Detect TME keyid bits before
 setting MTRR mask registers
Content-Language: en-US
To: Paolo Bonzini <pbonzini@redhat.com>, <linux-kernel@vger.kernel.org>,
	<kvm@vger.kernel.org>
CC: Zixi Chen <zixchen@redhat.com>, Adam Dunlap <acdunlap@google.com>, "Kirill
 A . Shutemov" <kirill.shutemov@linux.intel.com>, Xiaoyao Li
	<xiaoyao.li@intel.com>, Dave Hansen <dave.hansen@linux.intel.com>, "Thomas
 Gleixner" <tglx@linutronix.de>, Ingo Molnar <mingo@kernel.org>,
	<x86@kernel.org>, <stable@vger.kernel.org>
References: <20240131230902.1867092-1-pbonzini@redhat.com>
 <20240131230902.1867092-3-pbonzini@redhat.com>
From: "Huang, Kai" <kai.huang@intel.com>
In-Reply-To: <20240131230902.1867092-3-pbonzini@redhat.com>
Content-Type: text/plain; charset="UTF-8"; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?c3laRjZ2eFlsMDRiVmlxOHhvNjdPRGN4RTM1enplSFhFcUNra1ljNkNNMHJW?=
 =?utf-8?B?aklHcmM1VHI0WHh6T2ZUTEdvNmwyY1UrRUJENFEwR05rMWlXZ2JZU0hvV0Z3?=
 =?utf-8?B?TWQ2Q0VkcHpDR1I3K3pzLzlkbkowMU1OWDlFMXd6RWt6b1lpaXBPOW5hUk1t?=
 =?utf-8?B?clBoa1h6c1V5bjNDajZVT0RENnFlNFNNYXVKTnZtTzBoeFZnU3NLYndIZXZQ?=
 =?utf-8?B?eDFIZVB3OGFsR2kzY21xMEZ3NkxBdHczNGhJYytqSE0vNUZxTnpkK2ZFdlBo?=
 =?utf-8?B?cjhManIweUg4ZUNXNmhaVkpsWjhtMTRDdk0rOWhiSjlXdHVIM3BNTHB3ZUQv?=
 =?utf-8?B?cjVKaFpMaDMyWTh1WHJTaDdId0w4TVlvSVd0cVBkTmxBTllmSFhRM2czUEds?=
 =?utf-8?B?eHRzaUkwL2R4azRjYnEzbW9SSGFFZGRUeW45VFNtOWNMbkxHdGhzOVU5dVlK?=
 =?utf-8?B?WjVjQmhFNFF2a2djWjVkd3JaVUZkMm5MUjJkVlliSUwwT1ZpMCthdjFwS0Fr?=
 =?utf-8?B?UnBEZmxnMGJFcmEzK1k0TEpyTHpyUDR4MFcvVFNOK3htL2JrM1ovV0JHS3hG?=
 =?utf-8?B?Vk5kUTVHV2ZBRXpyb0pwK3ByQzdvOGhIeDN5MHBjcFU2WlBxZzNYSkR6d1Jo?=
 =?utf-8?B?RUpZenVjcTJvei8zVmVrczYxTGg2ZmlZc1k4ejVpT3dMV1pqVzlOSGdtdUJW?=
 =?utf-8?B?K0NyTFJ6YnJHcWJGSWpQdk80UnFPS2xORy9FemhsZVU2clpyelA2N3RPTElB?=
 =?utf-8?B?YS9FV1VZR2ZwbHAzTWJjaXJSTUd2ZnRVSG44VHh6THBHQzZHYi82TWl6NXdu?=
 =?utf-8?B?UHlxMU9qdTRRRXhNV0Fiem5aTDdNRUFpYUtPa3ZCSFR3VitYTHg3TS8yS2Fx?=
 =?utf-8?B?akNpdWtLZGJYUUQ3Y05KUTAzYnYwNHZ4VnBNRTltS05lNXBab2tPVE9SM05h?=
 =?utf-8?B?U01PRHRwV2R4RllEa25kM24vcTY2SDdpV1ZDY1FHU0FkUEVxK3ltd3FnMkN1?=
 =?utf-8?B?SThmdVkyYmc4YjdrVzFxRWlBandxeXRXRlVDOHJ6ek1WYndnaUk1STNpTFk5?=
 =?utf-8?B?NnEvNmFweVBLZzMxRGJrbzhaNkRsbHlnanE5VlhCVTRJaFkxV3pYNGhUT1RM?=
 =?utf-8?B?c3F6dWo5UTlVbHZNS2hyNEFqRUtYR0hrZkFrVWFwNklCSHFnYXJONGNXSU1m?=
 =?utf-8?B?ZzRaRkZpS0xVelQvakxCMnRCQ3lGTm12VG1oRHFSSDVla1IvdTNCTWFMNkds?=
 =?utf-8?B?V2xIb09hZmIrWFhaZ3VmZldUSE94NCszSnYvT3hwdk4ydmZTTS9LOFBvMU5J?=
 =?utf-8?B?S2F3UVY0ZGVURFg2U0thQ0FnNmhoT0QyS2VSNEVtWlN3R0Z1RytVaFhZM3hW?=
 =?utf-8?B?V2lOcFRUaWliWTdjb1ROYTlKcUJQNzNPSHd3N28xNkV3TTE2WXp1a0NyL0lG?=
 =?utf-8?B?bXBQZzdKa2gzME16UDd5bjh2WEF1am1rTytEVnZRZUs2ajk1a1VMRUpGUDF5?=
 =?utf-8?B?WFJzWTRvN2pZSER3cjdjMXJHYnRzSVkrY0xUekZFVzQwV2hzdUNMdlc4Slp4?=
 =?utf-8?B?MzhncXJIRnVqblVaUWpFb1VBNVl1dndqTFhReXlFQWgveTRDVkJ2V1NzSlp0?=
 =?utf-8?B?aDZmRS9DUHd4eldyTXpKcTJXcHI5K0lObDVaNjNCYklXS1VyK3pnVlhPb1RX?=
 =?utf-8?B?aU0rbVZHNk1TTnZWTE9md1ZxcGVJSkFOckxmc0J4eFNWU2xRUHZBc1drZ0lP?=
 =?utf-8?B?MDJRWU8wUDFiRkoxRjFjVFF0OFloMkxsL1BzNFZGSzJNUC92WFNMNDVwV044?=
 =?utf-8?B?YU9ITDRpWU5VcWxjMmcwQ29XMWYxOFhlY1BxOGEwL09LclF4RFJqd2ZYK3Vi?=
 =?utf-8?B?aEExOGc1U3Y5SVV3ckVTQUVVellQelFCa1dvL3hOK1pQUThpWU1waDAzZ1pm?=
 =?utf-8?B?cDdFejFqc0FEUkdkYU8yNGpiNDFvQ0NwKzZMbFM3M1NON0M4N05xQWV4M2R2?=
 =?utf-8?B?Z3QvRUlWRTBJRnM5ZlR6bWowRStBMFlJN0dXN3FEaWJQdzYvNUVXWHZCdlRk?=
 =?utf-8?B?RWU4U1JnY0lHTTYrZjhzeVdNTzM4b002NGpodms0K1lNZ3JtWnp1RURNejhO?=
 =?utf-8?Q?WX9FBw4F4iMlWbQiV0BDDo1id?=
X-MS-Exchange-CrossTenant-Network-Message-Id: b665365d-3522-42e2-5f5b-08dc233c766f
X-MS-Exchange-CrossTenant-AuthSource: BL1PR11MB5978.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2024 15:42:57.5494
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 29geP/Ifh+jUOtng0G40QUn7HcEpx6NlFo9Y2exa+YkoIbqJ7SaNKzXmal84sw4YrQ0aHNjAQd4KeJSJeMW68A==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR11MB6363
X-OriginatorOrg: intel.com


>   static void early_init_intel(struct cpuinfo_x86 *c)
>   {
>   	u64 misc_enable;
> @@ -322,6 +406,13 @@ static void early_init_intel(struct cpuinfo_x86 *c)
>   	 */
>   	if (detect_extended_topology_early(c) < 0)
>   		detect_ht_early(c);
> +
> +	/*
> +	 * Adjust the number of physical bits early because it affects the
> +	 * valid bits of the MTRR mask registers.
> +	 */
> +	if (cpu_has(c, X86_FEATURE_TME))
> +		detect_tme_early(c);
>   }
>   

early_init_intel() is also called by init_intel(), so IIUC for BSP 
detect_tme_early() will be called twice.

But this is no harm AFAICT, so:

Acked-by: Kai Huang <kai.huang@intel.com>