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smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0C7A1DA7; Thu, 1 Feb 2024 08:30:18 -0800 (PST) Received: from [192.168.1.100] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC1A63F738; Thu, 1 Feb 2024 08:29:32 -0800 (PST) Message-ID: Date: Thu, 1 Feb 2024 16:29:27 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH V4 00/11] perf/core: Add ability for an event to "pause" or "resume" AUX area tracing Content-Language: en-US To: Ian Rogers , Adrian Hunter Cc: Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org References: <20240111081914.3123-1-adrian.hunter@intel.com> <31bae596-ecb1-4b9c-9f1c-aaec4bcefd38@intel.com> From: James Clark In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 31/01/2024 16:53, Ian Rogers wrote: > On Mon, Jan 29, 2024 at 4:49 AM Adrian Hunter wrote: >> >> On 11/01/24 10:19, Adrian Hunter wrote: >>> Hi >>> >>> Hardware traces, such as instruction traces, can produce a vast amount of >>> trace data, so being able to reduce tracing to more specific circumstances >>> can be useful. >>> >>> The ability to pause or resume tracing when another event happens, can do >>> that. >>> >>> These patches add such a facilty and show how it would work for Intel >>> Processor Trace. >>> >>> Maintainers of other AUX area tracing implementations are requested to >>> consider if this is something they might employ and then whether or not >>> the ABI would work for them. >>> >>> Changes to perf tools are now (since V4) fleshed out. >>> >>> >>> Changes in V4: >>> >>> perf/core: Add aux_pause, aux_resume, aux_start_paused >>> Rename aux_output_cfg -> aux_action >>> Reorder aux_action bits from: >>> aux_pause, aux_resume, aux_start_paused >>> to: >>> aux_start_paused, aux_pause, aux_resume >>> Fix aux_action bits __u64 -> __u32 >>> >>> coresight: Have a stab at support for pause / resume >>> Dropped >>> >>> perf tools >>> All new patches >>> >>> Changes in RFC V3: >>> >>> coresight: Have a stab at support for pause / resume >>> 'mode' -> 'flags' so it at least compiles >>> >>> Changes in RFC V2: >>> >>> Use ->stop() / ->start() instead of ->pause_resume() >>> Move aux_start_paused bit into aux_output_cfg >>> Tighten up when Intel PT pause / resume is allowed >>> Add an example of how it might work for CoreSight >> >> Any more comments? > > I think the tools side looks good. The parsing changes match the > existing style. I wonder if it wouldn't be better to handle the valid > strings (pause, resume, etc.) in the lexer rather than a separate > parse function, but the pattern used matches the existing one. You can > have my Acked-by on the tools changes, although the subtleties of ARM > PMUs makes me somewhat nervous in this regard. > > Thanks, > Ian Acked-by: James Clark I will get round to adding the Coresight support at some point. I checked the new parsing in this version and it seems to work ok.