Received-SPF: pass (google.com: domain of linux-kernel+bounces-49073-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99;
From: Mike Tipton <quic_mdtipton@quicinc.com>
To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <djakov@kernel.org>
CC: <neil.armstrong@linaro.org>, <quic_rjendra@quicinc.com>,
        <quic_sibis@quicinc.com>, <abel.vesa@linaro.org>,
        <linux-arm-msm@vger.kernel.org>, <linux-pm@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
        Mike Tipton <quic_mdtipton@quicinc.com>
Subject: [PATCH 1/2] interconnect: qcom: sm8650: Use correct ACV enable_mask
Date: Thu, 1 Feb 2024 17:48:05 -0800
Message-ID: <20240202014806.7876-2-quic_mdtipton@quicinc.com>
In-Reply-To: <20240202014806.7876-1-quic_mdtipton@quicinc.com>
References: <20240202014806.7876-1-quic_mdtipton@quicinc.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain

The ACV enable_mask is historically BIT(3), but it's BIT(0) on this
target. Fix it.

Fixes: c062bcab5924 ("interconnect: qcom: introduce RPMh Network-On-Chip Interconnect on SM8650 SoC")
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
---
 drivers/interconnect/qcom/sm8650.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/interconnect/qcom/sm8650.c b/drivers/interconnect/qcom/sm8650.c
index b83de54577b6..b962e6c233ef 100644
--- a/drivers/interconnect/qcom/sm8650.c
+++ b/drivers/interconnect/qcom/sm8650.c
@@ -1160,7 +1160,7 @@ static struct qcom_icc_node qns_gemnoc_sf = {
 
 static struct qcom_icc_bcm bcm_acv = {
 	.name = "ACV",
-	.enable_mask = BIT(3),
+	.enable_mask = BIT(0),
 	.num_nodes = 1,
 	.nodes = { &ebi },
 };
-- 
2.17.1